Description
NVIDIA is seeking ASIC Verification Engineers to verify the design and implementation of the world's leading inference accelerator.
The successful candidate will have a real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and artificial intelligence.
Responsibilities:
- Verify the design and implementation of inference accelerator
- Develop and execute verification plans, testbenches, and test cases
- Collaborate with architects, designers, and pre and post silicon verification teams
- Implement and optimize automated verification flows
- Stay updated on the latest trends and advancements in ASIC design verification
Requirements:
- Bachelor's degree in EE, CS, or CE (or equivalent experience) and 8+ years of relevant industry experience
- Background with building block and SoC level testbench utilizing strong debugging and analytical skills
- Experience in verification using random stimulus along with functional coverage, assertion-based verification methodologies and tools
- Expertise in SystemVerilog and Universal Verification Methodology (UVM)
- Experience with design and verification tools (VCS, Verdi or equivalent)
- Knowledge of ASIC design flow, from specification to GDS
- Knowledge of applying machine learning to ASIC verification flow
Benefits:
- Competitive salaries
- Generous benefits package
- Equity
The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5.
This listing is enriched and indexed by YubHub. To apply, use the employer's original posting:
https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-ASIC-Design-Verification-Engineer---LPU_JR2026352