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Synopsys

ASIC Digital Design, Sr Staff Engineer

Synopsys
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onsite senior full-time Yerevan

First indexed 20 Oct 2026

Description

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

You’re an accomplished ASIC Digital Design Verification expert with 10+ years of experience, skilled in UVM environments and passionate about building reliable, high-performance chips. You’re a hands-on leader and mentor, eager to leverage AI tools, formal verification, and the latest methodologies. Your collaborative spirit, analytical mindset, and "can do" attitude drive your success in fast-paced, innovative environments.

Responsibilities:

  • Leading the verification of complex ASIC blocks and systems, ensuring they meet all specifications and performance goals.
  • Partnering with design teams to define verification requirements.
  • Building and maintaining UVM testbenches and agents.
  • Reviewing and improving test plans and code.
  • Applying SVA and formal verification techniques.
  • Developing and executing comprehensive test plans to verify the functionality and performance of your designs.
  • Implementing and analyzing coverage metrics.
  • Utilizing advanced EDA tools and methodologies to optimize design performance and power efficiency.
  • Staying up-to-date with the latest industry trends and technologies, continuously improving your skills and knowledge.

The Impact You Will Have:

  • Driving innovation in ASIC design, contributing to the development of cutting-edge technology that shapes the future.
  • Ensuring the delivery of high-performance, reliable, and power-efficient ASICs that meet customer requirements and industry standards.
  • Enhancing the overall quality and performance of Synopsys' products through meticulous design and verification processes.
  • Collaborating with cross-functional teams to solve complex design challenges, ensuring seamless integration and functionality.
  • Mentoring and guiding junior engineers, fostering a culture of continuous learning and improvement within the team.
  • Contributing to Synopsys' reputation as a leader in the semiconductor industry through your expertise and innovative solutions.

Requirements:

  • Extensive experience in ASIC digital design and verification. Background in RTL design is preferred.
  • 10+ years in ASIC/UVM verification.
  • SystemVerilog, C, Python, TCL/Perl proficiency.
  • Proficiency in using industry-standard EDA tools and methodologies for verification.
  • Deep understanding of High-Performance Interface IP protocols and their implementation in ASIC designs.
  • Strong analytical and problem-solving skills, with the ability to tackle complex and unique design challenges.
  • Excellent communication skills, with the ability to effectively collaborate with cross-functional teams and stakeholders.

Benefits:

  • Comprehensive medical and healthcare plans that work for you and your family.
  • In addition to company holidays, we have ETO and FTO Programs.
  • Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
  • Purchase Synopsys common stock at a 15% discount, with a 24-month look-back.
  • Save for your future with our retirement plans that vary by region and country.
  • Competitive salaries.
This listing is enriched and indexed by YubHub. To apply, use the employer's original posting: https://careers.synopsys.com/job/yerevan/asic-digital-design-sr-staff-engineer/44408/102150758208