Applications Engineering, Sr Staff Engineer

You are a highly motivated and innovative individual with a strong background in emulation and prototyping methodologies. You will collaborate closely with R&D and customers on hardware-assisted verification products, driving all aspects of the technology life cycle, from development to product sign-off and customer deployment.

Responsibilities:

• Collaborating closely with R&D and customers on hardware-assisted verification products.
• Driving all aspects of the technology life cycle, from development to product sign-off and customer deployment.
• Defining test strategies and methodologies to improve ease-of-use, quality of results, and interoperability with other Synopsys tools.
• Becoming an expert in emulation and prototyping methodologies and flows, including design, partitioning, testing, synthesis, and simulation-based verification.
• Leveraging your close interaction with customers, R&D, Marketing, and Sales teams to demonstrate the differentiated emulation/verification environment.
• Adapting to recognized best practices and policies in Synopsys to become proficient in various processes involved in the Product Release Cycle.
• Working with designs from varied verticals to enable and support key ZeBu products in early-stage development.

The Impact You Will Have:

• Enhancing Synopsys' emulation and prototyping solutions by driving technology development and customer deployment.
• Improving the ease-of-use, quality of results, and interoperability of Synopsys tools, contributing to overall product excellence.
• Providing expert consultation for solving complex problems, thereby increasing customer satisfaction and product adoption.
• Ensuring successful execution of projects from start to completion, contributing to the timely delivery of high-quality products.
• Supporting the advancement of cutting-edge designs in various verticals such as HPC, AI, storage, networking, and automotive.
• Facilitating the proliferation of Synopsys' differentiated emulation/verification environment through close collaboration with multiple teams.

Requirements:

• BSEE/MS with 10+ years of related experience.
• Expertise in Emulation and/or Prototyping flows, systems, and methodologies.
• Strong proficiency in Verilog, System Verilog, VHDL and C/C++
• Understanding of verification concepts and experience with functional simulators.
• Experience with scripting languages like Python and Tcl
• Knowledge in Simulation flows, Assertion, DPI, and Transactors.
• Complex problem-solving and debugging skills.
• Strong communication skills and the ability to interact with customers and peers.
• Knowledge in synthesis and timing analysis concepts (preferred).
• Familiarity with Synopsys solutions and tools like ZeBu, HAPS, VCS, Verdi, Proto Compiler, Synplify, DC, and Formality (preferred).
• Experience with Xilinx & Altera architecture and toolchains (preferred).
• Protocols like PCIe, USB, Ethernet, DRAMs, HBM, NAND Flash (preferred).
• Computing systems like CPU architecture, OS (preferred)
• Understanding of SW/HW debug methodologies and experience with standard SW/HW debug tools (preferred).
• DFT solutions (preferred)