Description
We are seeking a Staff Applications Engineer to independently support and lead customer deployments of RTL-stage power analysis, estimation, and optimization. You will own end-to-end delivery of PPRTL evaluations and production integrations for assigned accounts across logical, physical, and hybrid NDM import flows.
Key Responsibilities:
- Lead PPRTL evaluations and production deployments; present methodology, flow options, and CGE/CGR/DACGE results; manage timelines and customer deliverables.
- Deploy customized flows: logical (CGE/lint/ODC), physical (RTLA, glitch/SDF), and hybrid NDM import; develop Tcl scripts and staged save/restore methodologies.
- Apply calibration (WCDF extraction and synthesize -apply_calib) when designs require improved RTL-to-signoff correlation; guide customers on FSDB stimulus quality.
- Independently resolve elaboration, library, SDC, FSDB, power accuracy, glitch, and multi-rail UPF issues; troubleshoot VCS, Verdi, PrimeTime, and RTL Architect integration.
- Maintain PPRTL expertise and ecosystem positioning; mentor L2 AEs, contribute playbooks, and support sales on adoption and R&D feedback.
Required Qualifications:
- Bachelor's degree in EE, CE, or related field (Master's preferred); 5+ years in EDA, IC design, or low-power applications (or MS + 3 years).
- Hands-on RTL power analysis experience; working knowledge of CGE, glitch, and memory power concepts.
- Proficiency with VCS, Verdi/FSDB, SDC flows, and Tcl-based EDA automation.
- Demonstrated ability to independently manage customer-facing technical projects.
Preferred Qualifications:
- Direct Prime Power RTL 2.0 deployment experience; RTL Architect/Fusion Compiler and NDM-based flows.
- PrimeTime PX signoff correlation; UPF/IEEE 1801 multi-rail analysis; SoC or AI accelerator designs.
- Prior customer-facing AE role at an EDA vendor or semiconductor company.