Description
The Silicon One team at Cisco is looking for an ASIC digital design engineer to join their team. You will collaborate with Front-end RTL and backend physical design teams to gain a deep understanding of chip architecture. Your primary focus will be to drive high-quality Structural test, functional test, diagnostic feature implementation, IP development and integration, and test access including high speed IO with protocol.
Responsibilities:
- Collaborate with Front-end RTL and backend physical design teams
- Drive high-quality Structural test, functional test, diagnostic feature implementation, IP development and integration, and test access
- Ensure robust and reliable silicon solutions that meet Cisco's standards for performance and innovation
Minimum Qualifications:
- 10+ years of industry experience in ASIC digital design
- Prior experience in Verilog/System Verilog coding
- Prior experience with CDC/RDC concepts and relevant design implementation
- Prior experience with front-end tools (Verilog simulators, linting, CDC checkers, synthesis, formal verification)
- Prior experience with industry standard interface protocols such as AMBA(AXI, APB, AHB), JTAG etc, memories
Preferred Qualifications:
- Experience with power optimization techniques, power intent (UPF), power estimation
- Experience on SDC constraints development
- Experience with DFT/MBIST
- Experience with post-silicon debug
Benefits:
- Medical, dental and vision insurance
- 401(k) plan with a Cisco matching contribution
- Paid parental leave
- Short and long-term disability coverage
- Basic life insurance
- Paid time away (10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees)
- Flexible vacation time off program
- 80 hours of sick time off provided on hire date and each January 1st thereafter
- Optional 10 paid days per full calendar year to volunteer