Staff Engineer, Design Verification - High-Speed Interface IP

You are an experienced Digital Verification engineer who enjoys solving complex verification challenges in high-speed digital designs.

You will develop and execute verification strategies for complex ASIC and digital IP designs.

Key responsibilities include:

• Building, enhancing, and maintaining verification environments for high-speed digital interfaces.
• Developing test plans, test cases, stimulus, checkers, and coverage models to achieve verification objectives.
• Verifying functionality of designs involving high-speed protocols, particularly PCI/PCIe and USB.
• Debugging simulation failures and collaborating with RTL design engineers to identify and resolve functional issues.
• Analyzing functional and code coverage and driving verification toward closure.

The ideal candidate will have approximately 5–6 years of relevant experience in ASIC/Digital Verification, strong knowledge of ASIC and digital design verification concepts, and hands-on experience verifying high-speed protocols/interfaces.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.