Senior Technologist

We are seeking a Senior Technologist to lead the design and implementation of an ultra-low-latency electronic trading platform targeting microsecond and sub-microsecond latencies.

This role requires deep expertise across multiple domains: protocol design, distributed systems, market data infrastructure, hardware acceleration, and operational resilience.

Responsibilities:

• Architecture & Protocol Design: Design the foundational messaging layer, evaluating trade-offs between FIX and Simple Binary Encoding.
• FPGA & Hardware Acceleration Strategy: Evaluate and architect FPGA-based acceleration for latency-critical paths.
• Kernel Bypass & OS-Level Optimization: Architect the system to bypass the kernel network stack entirely using technologies like DPDK.
• Sequencer & Event Stream Design: Architect the sequencer component that creates deterministic, replayable event streams with minimal latency overhead.
• Ultra-Low-Latency Market Data Infrastructure: Design the market data ingestion layer targeting microsecond-scale processing.
• DMA Engine & Order Management: Lead design of the Direct Market Access engine targeting sub-ten-microsecond order processing.
• Normalized Order Entry & Venue Integration with Hardware Awareness: Design the abstraction layer that normalizes venue protocols.
• Risk Enforcement Architecture with Hardware Acceleration: Design the risk check framework targeting sub-microsecond enforcement.
• Failover, Replication & Deterministic Recovery at Scale: Architect the replica management strategy for ultra-low-latency systems.
• Network Infrastructure & Colocation Optimization: Design the network topology with latency as a primary constraint.
• Monitoring, Observability & Operational Control at Ultra-Low Latency: Design the monitoring infrastructure that observes the system without introducing latency or jitter.
• Performance Optimization, Profiling & Hardware Tuning: Identify and implement ultra-low-latency optimizations.

Requirements:

• Ultra-Low-Latency Systems Engineering
• Distributed Systems & Deterministic Computing
• Financial Markets & High-Frequency Trading
• Message Protocol & Serialization Design
• Kernel-Level Systems Programming & OS Optimization
• Performance Engineering & Profiling at Scale
• Systems Programming & Production Operations

Nice to Haves:

• Experience with market data feed handlers and direct exchange connectivity.
• Track record of building end-to-end ultra-low-latency systems from architecture through production.
• Familiarity with order entry normalization frameworks.
• Experience with kernel-bypass networking.
• Experience designing systems that pass regulatory audits or compliance reviews.

Salary: $210,000 - $275,000 per year

Benefits:

• 401(k) program with company-matching contributions
• Health, dental, vision, life, and disability insurance
• Paid time-off plan