Senior Mask Layout Design Engineer

We are seeking a Senior Mask Layout Design Engineer to join our dynamic group of diverse individuals responsible for handling meaningful high-speed mixed-signal circuit designs.

Job Overview As a Senior Mask Layout Design Engineer, you will perform physical layout for mixed-signal functions like PLL's, high-speed SerDes, Analog to Digital converters, and ESD structures designs in state-of-the-art sub-micron CMOS technologies using Cadence tools. You will work cross-functionally with ASIC and mixed-signal engineers to customize designs for integration in VLSI products, participate in floor planning, custom layout, and verify against design rules and schematics.

Requirements

• BSEE or equivalent experience
• Minimum of 7+ years of industry experience in Mask and Layout Design
• Deep understanding of analog circuit layout concepts in submicron CMOS technologies
• Authority with Cadence custom circuit design tools, particularly Virtuoso
• Experience running and debugging with verification tools such as Dracula, Hercules, Calibre, and Primeyield
• Ability to work effectively in a team with good interpersonal skills, enthusiasm, and positive energy
• Proficiency in scripting languages like Perl, Python, Skill, etc.
• Knowledge of DRC and LVS checking flows, ability to customize decks

Benefits You will also be eligible for equity and benefits.