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From the employer's careers site First seen 13 Nov 2026

Application Engineering, Architect Engineer

Synopsys Moreira, Porto senior full-time

The employer hasn't listed a salary.

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Description

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines.

You are a DDR/LPDDR Controller System Architecture Specialist who can work directly with customer architects to close real system-level memory subsystem design decisions. You will help customers integrate DDR/LPDDR controller IP into complex SoCs, identify key requirements or gaps, and translate customer feedback into actionable input for Synopsys Product Management, R&D, and roadmap planning.

Responsibilities

  • Own the technical architecture engagement for DDR/LPDDR controller IP with strategic customers, from early platform requirements through architecture closure and initial deployment readiness.
  • Work with customer architects and engineering teams to define suitable DDR/LPDDR memory subsystem configurations for advanced SoC platforms.
  • Analyze system-level trade-offs related to memory bandwidth, latency, power efficiency, quality of service, reliability, validation, and scalability.
  • Translate customer platform requirements and integration constraints into clear feedback for Synopsys Product Management, R&D, and roadmap planning.
  • Support technical closure of design wins by providing architecture guidance, configuration recommendations, and competitive positioning.
  • Develop reusable technical material, application notes, and customer-facing guidance based on real engagement experience.
  • Train FAEs and customer teams on DDR/LPDDR architecture, memory subsystem integration, performance tuning, validation expectations, and deployment best practices.

The Impact You Will Have

  • Improve the quality of DDR/LPDDR design wins by ensuring customer memory architectures are technically sound before commitment.
  • Strengthen Synopsys DDR/LPDDR roadmap by feeding real customer memory subsystem requirements into product planning and R&D execution.
  • Reduce customer integration risk by identifying architecture, performance, power, validation, and bring-up issues early.
  • Help establish Synopsys as a trusted technical partner for next-generation AI, HPC, mobile, automotive, networking, and edge computing platforms.

Requirements

  • Bachelors and/or Masters Degree in Electrical and/or Electronic Engineering, Computer Engineering or Computer Science
  • 5+ years of experience in DDR/LPDDR architecture, memory subsystem design, SoC integration, silicon validation, systems engineering, applications engineering, or customer-facing technical leadership.
  • Solid understanding of DDR and/or LPDDR controller IP, including memory architecture concepts, controller configuration, scheduling, quality of service, power management, training, validation, or system integration.
  • Good system-level understanding of SoC integration and ability to reason through memory bandwidth, latency, power efficiency, quality of service, reliability, validation, and software/firmware trade-offs.
  • Experience engaging directly with customer architects, design teams, validation teams, and technical decision-makers.
  • Ability to translate ambiguous customer requirements into clear technical recommendations, product feedback, and closure plans.
  • Strong technical communication skills, including clear written analysis, structured trade-off explanation, and ability to align customer, sales, product, and engineering teams.

Nice to Have

  • Experience with Linux, firmware bring-up, or software-driven debug of DDR/LPDDR subsystems.
  • Familiarity with advanced SoC architectures used in AI, HPC, automotive, mobile, networking, or compute platforms.
  • Experience with memory performance analysis, traffic modeling, quality-of-service management, memory hierarchy optimization, or system-level benchmarking.
  • Knowledge of advanced topics such as DDR5, LPDDR5X, LPDDR6, memory training algorithms, RAS features, chiplet-based memory architectures, or AI memory bandwidth optimization.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.

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Skills

Required

  • DDR/LPDDR architecture
  • memory subsystem design
  • SoC integration
  • silicon validation
  • systems engineering
  • applications engineering
  • customer-facing technical leadership

Nice to have

  • Linux
  • firmware bring-up
  • software-driven debug
  • advanced SoC architectures
  • memory performance analysis
  • traffic modeling
  • quality-of-service management
  • memory hierarchy optimization
  • system-level benchmarking

Ready to apply?

You apply with the employer directly. Their original posting is here: https://careers.synopsys.com/job/moreira/application-engineering-architect-engineer/44408/101040901184

Apply on Synopsys