Description
NVIDIA's Silicon Co-Design Group is seeking a Silicon Product Engineer – Manufacturing to join the Testability, Manufacturability, Reliability & Quality (TMRQ) team.
The successful candidate will help validate and implement SLT/BLT Production diagnostics and test specs for silicon features in a high-volume manufacturing environment. They will verify POR specifications and support post-silicon validation for complex semiconductor chips.
Key Responsibilities:
- Develop and implement robust closed-loop analysis for VF characteristics and POR expectations vs. production screens to improve overall quality of MFG screening diags.
- Support VF/VMIN/VMAX/PVT spec validation and productization activities across Manufacturing teams and product segments.
- Partner with multi-functional HW/SW teams to determine test coverage and constraints for high-volume manufacturing screens.
- Support prototyping and fine-tune speed, power, circuits, yield, and quality for effective silicon coverage in the SLT socketed environment.
- Coordinate, develop, and maintain SLT/BLT testing flows, incorporating takeaways from silicon and correlating them to design for shift-left improvements.
- Initiate and drive process improvements and preventative actions through root cause analysis and data analytics.
Requirements:
- Bachelor's or Master's Degree in Microelectronics/Electrical/Electronic/Computer Engineering or equivalent experience.
- 3+ years of relevant industry experience in silicon Post-silicon PVT validation and/or high-volume manufacturing testing for complex SoCs, GPUs, CPUs, or similar.
- Hands-on lab experience with silicon bring-up, lab debug, shmoo analysis, VF characteristics, test content bring-up, and correlation to Si characterization, yield, and coverage optimization.
- Strong EE fundamentals, device physics, knowledgeable in Silicon design, statistics, STA concepts, fault analysis, sampling, and computer architecture.
- Strong data analysis skills, a learning attitude, and prior experience working with large volumes of data.
Nice to Have:
- Prior understanding of manufacturing test strategy for a major silicon product (e.g., GPU/SoC/CPU) from early planning through ramp to QS/production.
- Good understanding of firmware/driver structures and their interaction with HW.
- Problem-solving, debugging, analysis, and logical reasoning skills with examples to prove it.
- Experience with Python, BASH, Linux, and scripting.
Salary Range: The base salary range is 116,000 USD - 189,750 USD for Level 2, and 136,000 USD - 218,500 USD for Level 3.
Benefits: You will also be eligible for equity and benefits.