Description
Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
You are a seasoned SOC Engineering professional with a passion for innovation and problem-solving. With a strong background in Electronics Engineering, Electromechanics, or Telecommunications, you bring hands-on experience in Place & Route domains using advanced tools like Fusion Compiler/ICC2. You have a keen understanding of P&R, extraction, timing, IREM, and Physical Verification fundamentals. Your proficiency in scripting languages such as TCL and PERL, combined with your ability to guide and mentor junior team members, sets you apart.
Responsibilities
- Developing and implementing SOC design using Synopsys EDA tools and IP, covering all stages from Verilog to GDS.
- Contributing to both turnkey projects and serving as a trusted advisor to customer design and CAD teams.
- Innovating solutions to problems independently, with occasional guidance.
- Setting task-level goals and consistently meeting schedules.
- Collaborating with other Synopsys teams, including BU AE and Sales, to broaden and deploy tool and IP solutions.
- Providing technical guidance and mentorship to junior team members.
The Impact You Will Have
- Enhancing the efficiency and effectiveness of SOC design processes.
- Driving innovation in chip design and verification methodologies.
- Ensuring the successful deployment of Synopsys' EDA tools and IP solutions.
- Improving customer satisfaction through expert advisory and technical support.
- Contributing to the development of high-performance silicon chips and software content.
- Supporting the continuous technological advancements at Synopsys.
Requirements
- BS/MS/PhD in Electronics Engineering, Electromechanics, or Telecommunications.
- 5 to 10 years of hands-on experience in Place & Route domains using Fusion Compiler/ICC2 tool.
- Strong debugging skills and a good understanding of P&R, extraction, timing, IREM, and Physical Verification fundamentals.
- Experience with signoff tools like PT, Redhawk, StarRC, ICV is an advantage.
- Proficiency in TCL/PERL scripting.
Benefits
- Comprehensive medical and healthcare plans that work for you and your family.
- In addition to company holidays, we have ETO and FTO Programs.
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
- Purchase Synopsys common stock at a 15% discount, with a 24-month look-back.
- Save for your future with our retirement plans that vary by region and country.
- Competitive salaries.