Senior Chip Design Engineer

NVIDIA is looking for a Senior Chip Design Engineer to join its Network Adapter Silicon group.

As a Senior Design Engineer at NVIDIA Networking Silicon team, you will join a group of engineers to design and implement the next-generation state-of-the-art Networking Silicon chips.

Responsibilities

• Work in a combined design and verification team which develops core units within the Networking silicon.
• Own micro-architecture definition and RTL implementation of chip blocks/entities according to specifications, performance, timing, area, and power requirements.
• Drive your design through the full implementation flow , synthesis, timing closure, lint/CDC, and physical design constraints , together with the backend teams.
• Work closely with multiple teams within organisations such as Architecture, Micro-Architecture, Verification, FW, and Post-Silicon validation.

Requirements

• B.Sc. in Electrical Engineering or Computer Engineering, or equivalent experience.
• 5+ years of proven experience in RTL design.
• Strong knowledge of HDL (Verilog/SystemVerilog/VHDL).
• Solid understanding of digital design fundamentals , pipelining, clock domain crossing, arbitration, and low-power techniques.
• Familiarity with synthesis and static timing analysis is an advantage.
• A great teammate with good communication and interpersonal skills.