Description
Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining software used in chip design, verification, and manufacturing.
You will be a Memory Design Manager, leading and mentoring a team of engineers to develop cutting-edge CMOS embedded memory technologies.
Responsibilities:
- Develop CMOS embedded memories such as SP SRAM, DP SRAM, Register File, TCAM, and ROM.
- Lead and mentor a team of engineers, enhancing workflows and methodologies.
- Design architecture and circuit implementation for ultra-high-speed, ultra-low-power, or high-density designs.
- Perform schematic entry, circuit simulation, layout planning, and supervision.
- Verify and validate designs to ensure high quality and performance.
- Interface with CAD and Frontend engineers to automate memory compilers and generate EDA models.
- Develop and verify bit cells, drive physical layout design and verification.
- Provide support and perform additional duties as required.
Requirements:
- Bachelor’s or Master’s degree in Electrical Engineering, Telecommunication, or related fields with 8 to 10 years of experience.
- Proficiency in CMOS memory design, circuit simulation, and memory layout design.
- Experience with layout parasitic extraction and verification tools.
- Excellent analytical, problem-solving, and attention-to-detail skills.
- Ability to develop comprehensive documents, reports, and presentations.
- Proficiency with Microsoft Office tools: Word, Excel, PowerPoint, SharePoint, and Outlook.
- Self-motivated, self-directed, and well-organized with strong leadership abilities.
- Strong command of English, both verbal and written.
- Excellent interpersonal communication and teamwork skills.
Benefits:
- Comprehensive medical and healthcare plans.
- Time away programs including ETO and FTO.
- Family support including maternity and paternity leave.
- ESPP: purchase Synopsys common stock at a 15% discount.
- Retirement plans varying by region and country.
- Competitive salaries.