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Synopsys

Staff Applications Engineer (ASIC, Physical Design, TCL / Python)

Synopsys
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staff full-time Bengaluru, Karnataka

First indexed 7 Oct 2026

Description

You will engineer the future with Synopsys, the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. You will work directly with customers building the chips that power everything from AI accelerators to automotive systems, and the solutions you deliver will matter.

You have spent the last few years deep in the RTL2GDS flow, and you know that the real work happens in the messy middle where verification meets implementation and theory meets timing closure. You understand that a clean ECO is not about clever tricks, it is about knowing the tools well enough to make the right call under pressure when a customer's tapeout schedule depends on it.

Your responsibilities will include:

  • Supporting customers through physical design implementation and design closure using Synopsys tools
  • Debugging complex design challenges across timing, power, area, congestion, routing, and runtime optimization at advanced process nodes including 5nm and below
  • Helping customers achieve implementation closure while meeting aggressive tapeout schedules and design quality requirements
  • Providing technical guidance on best practices for synthesis, place-and-route, timing closure, power optimization, and advanced implementation methodologies
  • Building and maintaining automation scripts in TCL to streamline workflows and improve turnaround time for customer engagements
  • Utilizing AI-powered tools and workflows to improve productivity, accelerate issue resolution, and enhance customer support effectiveness
  • Collaborating with internal R&D teams to reproduce customer issues, validate tool behavior, and feed real-world use cases back into product development
  • Presenting technical solutions and recommendations to senior customer engineers and design leads during critical project phases
  • Working across the full RTL-to-GDS flow, from implementation through signoff and tapeout readiness

The impact you will have includes:

  • Enabling customers to achieve first-pass silicon success on high-performance chips powering AI, automotive, networking, and mobile applications
  • Improving customer productivity by helping them maximize the value of Fusion Compiler and advanced implementation methodologies
  • Reducing customer tapeout risk by identifying and resolving implementation challenges early in the design cycle
  • Influencing Synopsys tool development by bringing real customer pain points and use cases directly to engineering teams
  • Accelerating customer productivity through automation, AI-assisted workflows, and best-practice methodologies that become adopted across their organizations
  • Building long-term technical relationships with leading semiconductor companies in the region, becoming their trusted advisor for implementation and design closure challenges
  • Helping shape how advanced-node designs are implemented by solving problems at the edge of what today's tools and methodologies can achieve
  • Strengthening Synopsys's reputation as the partner that shows up when the hard problems need solving

To qualify, you will need:

  • A Bachelor's degree in Electrical Engineering, Computer Engineering, or related field with at least 5 years of hands-on ASIC, physical design, implementation, or CAD engineering experience
  • Direct experience with RTL-to-GDS implementation flows, including synthesis, place-and-route, timing closure, and physical design optimization
  • Strong working knowledge of Fusion Compiler, ICC2, or equivalent digital implementation tools
  • Understanding of timing, power, congestion, routing, and design closure methodologies
  • Working knowledge of Formality, PrimeTime, or related EDA tools is a strong advantage
  • Proficiency in scripting with TCL and Python to automate design tasks and improve workflow efficiency
  • Experience with advanced process nodes (7nm and below) is a strong plus, especially if you have worked through design closure challenges at those nodes
  • Demonstrated ability to leverage AI tools and automation technologies to improve engineering productivity and problem-solving effectiveness
  • Business-level English proficiency with the ability to communicate technical concepts clearly in written and spoken form
  • Willingness to engage directly with customers, including senior engineers and design managers, in both remote and onsite settings
This listing is enriched and indexed by YubHub. To apply, use the employer's original posting: https://careers.synopsys.com/job/bengaluru/staff-applications-engineer-asic-physical-design-tcl-python/44408/101601440208