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Synopsys

UCIe Application Engineer, Sr Staff

Synopsys
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senior full-time Hsinchu, Taiwan

First indexed 16 Jul 2026

Description

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines.

You are a seasoned engineering professional with a deep passion for advancing semiconductor technology. With at least a decade of experience in ASIC design, verification, or applications engineering, you bring a robust understanding of both front-end and back-end development.

What You'll Be Doing:

  • Guiding customers through the integration of Synopsys UCIe IP into their ASIC SoC and systems, addressing both technical and process challenges.
  • Providing expert advice on IIP configuration, simulation, synthesis, floorplanning, static timing analysis (STA), and design-for-test (DFT) strategies.
  • Conducting in-depth integration reviews at key SoC development milestones to ensure optimal IP performance and compatibility.
  • Delivering comprehensive training and workshops to customer engineering teams on the latest UCIe specifications and integration best practices.
  • Collaborating with Synopsys R&D to develop application notes and technical collateral on advanced integration topics.
  • Supporting pre-sales activities, including technical demos, conference presentations, and responding to technical inquiries from prospective clients.
  • Providing feedback and insights to R&D for continuous improvement of Synopsys IIP products based on customer experiences and emerging industry trends.
  • Participating in internal design reviews to align product development with evolving customer needs and market demands.

The Impact You Will Have:

  • Accelerating customer success by ensuring seamless integration of Synopsys UCIe IP, reducing time-to-market for innovative SoC solutions.
  • Enhancing the reliability and performance of next-generation semiconductor products across diverse market segments.
  • Driving adoption of the latest chiplet interconnect standards through effective customer education and support.
  • Contributing to the evolution of Synopsys' IP portfolio by relaying critical customer feedback and identifying opportunities for product enhancement.
  • Influencing the direction of industry standards and best practices through thought leadership and technical collaboration.
  • Representing Synopsys at industry events, reinforcing our leadership position in IP integration and semiconductor innovation.
  • Building long-term partnerships with key customers, fostering trust and collaboration across the semiconductor ecosystem.

What You'll Need:

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • Minimum 10 years of experience in ASIC design, verification, or applications engineering within advanced technology nodes (10nm/7nm/5nm/3nm).
  • Hands-on expertise in mixed-signal and high-speed interface design and integration, ASIC front-end and/or back-end implementation, including simulation, synthesis, floorplanning, and DFT.
  • Strong knowledge of EDA tools and methodologies, with additional experience in P&R, Physical Verification, and Signal/Power Integrity highly valued.
  • Proven ability to debug and troubleshoot silicon and/or FPGA/hardware, with familiarity in Die-to-Die and PCIe/CXL protocols considered a significant advantage.
This listing is enriched and indexed by YubHub. To apply, use the employer's original posting: https://careers.synopsys.com/job/hsinchu/ucie-application-engineer-sr-staff/44408/97819241392