Description
At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're powering it all with the world's most advanced technologies for chip design and software security.
You are a highly skilled and passionate engineer with a talent for tackling complex problems and a strong desire to advance cutting-edge technology. With over 3 to 5 years of experience in Physical Implementation RTL-GDS, you bring deep expertise in autonomously diagnosing and resolving synthesis and place-and-route (PnR) challenges.
Responsibilities
- Drive global customer adoption of Synopsys Implementation products by providing expert technical guidance and support throughout the RTL-to-GDS flow.
- Diagnose and resolve synthesis and place-and-route challenges, leveraging in-depth knowledge of customer designs and Synopsys tools.
- Engage in technical campaigns,such as benchmarks, deployments, and new solution enablement,to fuel Synopsys solution adoption and improve usability.
- Act as a customer advocate, collaborating with R&D to influence product roadmap and future technologies based on real-world feedback.
- Author technical articles for the Knowledge Base, providing self-help guidance for common customer challenges.
- Roll out new product methodologies to customers through training sessions and technical support engagements.
The Impact You Will Have:
- Deliver comprehensive support and effective technical solutions that elevate customer satisfaction and project success.
- Drive innovation by tackling advanced design challenges and collaborating with R&D to enhance product performance.
- Promote Synopsys implementation tools, expanding market presence and accelerating solution adoption.
- Ensure seamless EDA transitions for customers, optimizing outcomes in power, cost, and performance.
- Influence the development of next-generation processes and models for silicon chip manufacturing.
- Empower engineering teams through technical mentorship and knowledge sharing.
Requirements
- Expertise in implementation methodologies, with deep hands-on experience in Synopsys Fusion Compiler.
- Thorough understanding of RTL-to-GDS flows and methodologies, including synthesis, place & route, and timing analysis.
- Proficiency in scripting languages such as Tcl, Unix shell, Perl, and Python.
- Experience in low-power flows, design planning, and static timing analysis (STA).
- Excellent verbal and written communication skills; prior customer-facing experience is a plus.
- B-Tech or equivalent with minimum 5 years of experience, or M-Tech or equivalent with minimum 3 years of experience.
- Domain knowledge in multiple chip tape-outs, preferably at 7nm or lower nodes across foundries.
Benefits
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.