DFT Staff Engineer- SoC Engineering

Job Title: DFT Staff Engineer

Overview

You will be part of the Systems Solutions Group (SSG) at Synopsys, working on designing and developing cutting-edge semiconductor solutions as a DFT Staff Engineer. You will own DFT architecture, implementation, integration, and verification for complex SoCs and subsystems from specification through tapeout.

Responsibilities

• Own DFT architecture, implementation, integration, and verification for complex SoCs and subsystems from specification through tapeout, working directly with customer and internal design teams.
• Define and execute test strategies across scan insertion and ATPG, memory BIST, logic BIST, and analog/PHY test considerations to meet coverage, quality, yield, and cost targets.
• Drive DFT signoff readiness by identifying testability risks early, proposing design changes, and ensuring closure across the RTL-to-GDS flow.
• Develop and institutionalize reusable DFT methodologies, checklists, and guidelines using Synopsys EDA tools to solve real customer problems on active service projects.
• Partner with silicon validation and test engineering teams on post-silicon debug, failure analysis triage, and pattern refinement to improve production outcomes.
• Collaborate closely with RTL design, functional verification, physical design, timing, and power teams to ensure testability is designed in from architecture through signoff.
• Provide technical guidance to peers through design reviews, integration/debug support, and best-practice sharing.

Requirements

• Bachelor's or Master's degree in Electronics Engineering, Electrical Engineering, or related field.
• Typically 5+ years of hands-on SoC DFT experience with proven depth in scan/ATPG, memory BIST, logic BIST, and analog test considerations.
• Strong understanding of the end-to-end SoC design flow from microarchitecture through RTL, verification, synthesis, timing/physical implementation, and signoff.
• Demonstrated experience owning DFT implementation for complex SoCs that have taped out and gone to production.
• Strong working knowledge of Synopsys DFT tools such as TetraMAX, DFT Compiler, and BIST Architect is a plus.
• Proven ability to work cross-functionally to resolve testability issues and drive closure under schedule constraints.
• Post-silicon debug experience and collaboration with test engineering teams to refine production test programs is a plus.

Benefits

• Comprehensive medical and healthcare plans that work for you and your family.
• In addition to company holidays, we have ETO and FTO Programs.
• Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
• Purchase Synopsys common stock at a 15% discount, with a 24-month look-back.
• Save for your future with our retirement plans that vary by region and country.
• Competitive salaries.