Description
Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining software used in chip design, verification and manufacturing. They work on assignments like designing, developing, and troubleshooting software, leveraging the state-of-the-art technologies like AI/ML, GenAI and Cloud. Their critical contributions enable world-wide EDA designers to extend the frontiers of semiconductors and chip development.
You have spent years in the trenches of ASIC verification, and somewhere along the way you realized that emulation is not just another tool in the flow, it is the thing that makes or breaks your ability to ship complex IP on time. You know PCIe or DDR inside and out, not just the spec but the weird corner cases, the errata that nobody talks about, and the places where emulation models fall short of what the design team actually needs.
You will work on IP that powers the next generation of silicon, and the emulation strategies you define will directly affect how fast we get there.
Responsibilities
- Bridge the gap between Emulation IP capabilities and Design IP verification needs across both Controller and PHY domains for high speed interfaces like PCIe and DDR
- Define technical requirements for Emulation IP, working directly with IP development and verification teams to ensure correct implementation and deployment on Zebu platforms
- Track and report key metrics on Emulation IP quality, performance, and coverage, driving continuous improvement across verification workflows
- Stay ahead of evolving PCIe and DDR standards, interpret specification updates, ECNs, and errata, and translate those into actionable changes for both Emulation and Design IP teams
- Review and validate test plans for Emulation IP and Design IP, ensuring completeness, traceability, and alignment with product quality goals
- Collaborate cross-functionally with verification, design, product, and platform teams to optimize emulation methodologies and standardize best practices
- Mentor engineers on emulation strategies, verification techniques, and IP development workflows
The Impact You Will Have
- Accelerate time to market for high performance IP by defining emulation strategies that catch issues earlier and reduce silicon respins
- Elevate product quality across Synopsys IP portfolios by ensuring Emulation IP meets the real needs of design and verification teams
- Drive adoption of best in class emulation and verification methodologies that become standard practice across the organization
- Influence the next generation of emulation solutions and workflows, positioning Synopsys as a leader in pre-silicon validation
- Improve cross-functional collaboration and alignment between geographically distributed teams, reducing friction and rework
- Standardize verification workflows and metrics, making it easier for teams to track progress, identify gaps, and deliver with confidence
- Shape how Synopsys develops and deploys Emulation IP for cutting edge digital designs and system architectures
Requirements
- 8+ years of hands-on experience in emulation, pre-silicon verification, or IP product development
- Expert-level knowledge of PCIe or DDR interfaces, including protocol details, verification strategies, and real-world implementation challenges
- Extensive experience with Zebu or similar emulation platforms, specifically for IP verification and system-level validation
- Proven track record leading IP product development initiatives with a strong focus on emulation and verification
- Demonstrated ability to work cross-functionally in matrixed, global teams and drive consensus across diverse stakeholders
- Strong communication skills with the ability to influence technical direction and inspire change across engineering teams
- Comfort working in dynamic, ambiguous environments where requirements evolve and priorities shift