Description
We are looking for a best-in-class Physical Design Engineer to join our outstanding Networking Silicon Engineering team. As a Senior Physical Design Backend Engineer, you will develop the industry's best high-speed communication devices, delivering the highest throughput and lowest latency. Your daily work will involve all aspects of physical design chip development, including synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
The ideal candidate will have a B.SC./M.SC. in Electrical Engineering/Computer Engineering or equivalent work experience, with 5+ years of experience in Physical Design. You should be familiar with physical design flows and methodologies, including PNR, STA, and physical verification. Experience with physical design EDA tools such as Synopsys and Cadence is also required.
As a great teammate, you will take part in flows development and be exposed to a variety of challenging designs, including high cell count and HS blocks. You will resolve complex timing and congestion problems, and contribute to the development of our groundbreaking and innovative chips.