Description
The Common Hardware Group (CHG) at Cisco is looking for a Package Layout Team Leader to lead and grow the San Jose layout team while supporting the execution of complex package programs.
As a Package Layout Team Leader, you will provide technical guidance, mentorship, resource coordination, and people leadership for package layout activities across advanced ASIC packaging projects.
Responsibilities:
- Lead and support the San Jose package layout team, providing technical guidance, mentorship, and day-to-day support to layout engineers.
- Support package layout activities for complex ASIC packaging projects, ensuring high-quality implementation aligned with package design, SI/PI, and manufacturing requirements.
- Collaborate closely with package leads, SI/PI teams, silicon floor planning, and manufacturing partners to resolve technical and process challenges.
- Coordinate layout resource allocation, priorities, and staffing across multiple concurrent projects.
- Support optimization of package pinouts, stack-ups, power distribution, escape routing, and high-speed interface implementation.
- Partner with the global Package Layout Manager and other regional leaders to align methodologies, tools, best practices, and engineering standards across sites.
- Contribute to hiring, onboarding, mentoring, and development of layout engineering talent in San Jose.
- Work with vendors and contractors as needed to support project execution and delivery goals.
- Drive continuous improvement in layout methodologies, quality, and engineering efficiency.
Minimum Qualifications:
- Bachelor’s degree in Electrical Engineering or a related field with 12+ years of work experience or Master’s degree in Electrical Engineering or a related field with 8+ years of work experience or PhD in Electrical Engineering or a related field with 5+ years of work experience.
- 5+ years of experience in package layout or advanced PCB/package implementation.
- Prior experience working with high-speed routing, power distribution networks (PDN), and package layout design principles.
- Experience with industry-standard EDA tools for package layout and design.
Preferred Qualifications:
- Experience leading or mentoring layout engineers or small technical teams.
- Proficiency with Cadence APD+ or equivalent package layout tools.
- Experience with ASIC package layout implementation, including high-speed interfaces and complex escape routing.
- Prior experience with SI/PI considerations and collaboration with cross-functional engineering teams.
- Experience working with vendors or outsourced layout resources.
- Experience with scripting languages such as Python, Perl, or TCL.
The starting salary range for this position is $214,100.00 to $309,800.00.