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OpenAI

Software Engineer, Silicon Design Methodology

OpenAI
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hybrid senior Full time $225K - $380K San Francisco

First indexed 7 Aug 2026

Description

Compensation

The base pay offered may vary depending on multiple individualized factors, including market location, job-related knowledge, skills, and experience. The salary range for this role is $225K - $380K, with generous equity, performance-related bonus(es) for eligible employees, and the following benefits.

Benefits include:

  • Medical, dental, and vision insurance for you and your family, with employer contributions to Health Savings Accounts
  • Pre-tax accounts for Health FSA, Dependent Care FSA, and commuter expenses (parking and transit)
  • 401(k) retirement plan with employer match
  • Paid parental leave (up to 24 weeks for birth parents and 20 weeks for non-birthing parents), plus paid medical and caregiver leave (up to 8 weeks)
  • Paid time off: flexible PTO for exempt employees and up to 15 days annually for non-exempt employees
  • 13+ paid company holidays, and multiple paid coordinated company office closures throughout the year for focus and recharge, plus paid sick or safe time
  • Mental health and wellness support
  • Employer-paid basic life and disability coverage
  • Annual learning and development stipend to fuel your professional growth
  • Daily meals in our offices, and meal delivery credits as eligible
  • Relocation support for eligible employees
  • Additional taxable fringe benefits, such as charitable donation matching and wellness stipends

About the Team

OpenAI's Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. The team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models.

About the Role

We're looking for a software engineer to help build the design methodology, software abstractions, and infrastructure that enable a small silicon team to develop complex chips rapidly and with high confidence. You will turn evolving architecture and design needs into reusable tools and workflows that improve iteration speed, quality, and then apply those tools to help construct world-class silicon.

Responsibilities

  • Develop and scale design methodologies for rapid first-party chip development and apply them to construct complex custom chips
  • Create abstractions that allow hardware structures, configurations, experiments, and results to be represented consistently across tools
  • Automate high-value engineering workflows and improve their reproducibility, observability, testability, and ease of use
  • Partner with architects, RTL designers, verification engineers, compiler engineers, and systems software engineers to gather requirements and then implement solutions
  • Use methodology and tooling to identify design risks early, accelerate iteration, and improve confidence in performance and implementation tradeoffs
  • Contribute across multiple aspects of software and hardware development as the first-party silicon program and its development methodology evolve

Requirements

  • Strong software engineering skills in C++, Python, Rust, or similar systems-oriented languages
  • Experience building engineering infrastructure, developer tools, simulation frameworks, EDA/CAD tooling, compilers, or verification systems
  • Understanding of digital design and computer architecture
  • Experience integrating RTL and IP components into an SoC
  • Designing APIs, object models, or data models for complex systems
  • Comfortable automating multi-stage workflows, building regression systems, and improving reproducibility across teams
  • Ability to reason across architecture, design, verification, performance modeling, and software boundaries
This listing is enriched and indexed by YubHub. To apply, use the employer's original posting: https://jobs.ashbyhq.com/openai/e961c9df-caa0-4b29-b37c-a3e02c564615