Embedded Memory Design Manager - 18136

Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining software used in chip design, verification and manufacturing.

You have spent a decade in memory design, where the difference between a working SRAM and one that fails at corner cases comes down to understanding transistor-level physics at 5nm. Embedded memory is not just another block, it is what makes or breaks power, performance, and area targets for the entire SoC.

As an Embedded Memory Design Manager at Synopsys, you will lead architecture, circuit design, and physical implementation of embedded memory IP including SRAM, register files, and ROM across advanced nodes. You will define block specifications with system architects, translating customer requirements into concrete design targets. You will manage circuit and layout engineers, assign work packages, track progress, and coordinate with project management.

Your responsibilities will include:

• Lead architecture, circuit design, and physical implementation of embedded memory IP including SRAM, register files, and ROM across advanced nodes
• Define block specifications with system architects, translating customer requirements into concrete design targets
• Manage circuit and layout engineers, assign work packages, track progress, and coordinate with project management
• Execute design reviews, create documentation including datasheets and design reports
• Support silicon evaluation, analyze field issues, and drive root cause analysis when designs fail
• Drive continuous improvement in design methodologies and technology evaluation with global teams

The impact you will have includes:

• Deliver memory IP meeting aggressive power, performance, and area targets for AI, automotive, mobile, and data center SoCs
• Enable faster customer time-to-market with robust, variation-aware memory solutions that work across process corners
• Build and mentor engineers who can independently own complex memory design challenges
• Influence memory architecture direction across Synopsys IP portfolio through technical reviews
• Reduce design risk and silicon respins by catching issues early through rigorous modeling and simulation
• Expand Synopsys memory IP capabilities into next-generation process nodes
• Strengthen the technical depth of the Da Nang Design Center through targeted mentorship, knowledge sharing, and continuous process improvement initiatives.

To be successful in this role, you will need:

• Bachelor's or Master's in Electrical Engineering, Computer Science, or equivalent
• 10+ years in full embedded memory design flow: architecture, circuit design, physical implementation, compiler automation, characterization, timing, and model generation
• Deep expertise in SRAM, register file, and ROM architecture with advanced custom circuit implementations
• Direct experience designing memory IP in advanced nodes (7nm, 5nm, or beyond) with variation-aware design understanding
• Strong knowledge of digital design, verification methodologies, and industry-standard EDA tools
• Experience managing engineering teams including task delegation, performance management, and technical mentorship

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.