Description
We're seeking a Senior Signal & Power Integrity Engineer to join our dynamic team working with state-of-the-art technology.
You will craft creative Signal Integrity solutions to complex system design problems, model and optimize system components, and perform system-level signal integrity simulations.
Responsibilities:
- Work on crafting creative Signal Integrity solutions to complex system design problems.
- Modeling and Optimization of vias, connectors, sockets, breakouts and various system components in 3D EM tools.
- System-level signal integrity simulations of high-speed NVlink 200Gbs+, USB-4, PCIe5, GDDR6, LP5X and other interfaces.
- Constant improvements of SI models using data from lab measurements and/or modelling tool/methodology updates.
- Substrate and board layout SI guidelines creation, review and post layout SI extractions.
- Simulation automation, data gathering, analysis and visualization using JMP, MATLAB or similar tools.
- Opportunity to work in a dynamic cross-functional role to optimize package, PCB, ASIC, mixed signal circuit.
Requirements:
- BS/MS-Electrical Engineering or equivalent experience with 3+ years of industry experience.
- Strong technical background in applied electromagnetics, transmission line theory and signal processing.
- SI work on one or more signaling standards like PCI express, USB, SATA, HDMI, HBM, DDR5, GDDR6, LPDDR5X, etc.
- Hands on use of 3-D modeling tools like ANSYS HFSS/Q3D, 2.5-D with ANSYS SIWAVE or similar and 2D such as Ansys2D.
- Familiarity with a system level timing or loss budget including silicon, package and board impairments.
- Familiarity with use of VNA, TDR, DSO, ParBERT and use of tools/applications like ADS, Ansys Designer, JMP, Matlab, Cadence Allegro.
Nice to have:
- Experience in interconnect electromagnetic model design for 200Gbps systems, particularly in backplane and midplane architectures.
- Hands-on expertise in characterizing and correlating high-speed interconnects including PKG, PCB, connectors and cable assemblies in the lab.
- Ability to post process and analyze interconnect measured SI data, using statistics when necessary.
- Knowledge of circuit design, board/pkg technology & design, link architecture, timing budget methodologies.
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4.
This listing is enriched and indexed by YubHub. To apply, use the employer's original posting:
https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-Signal-and-Power-Integrity-Engineer---Hardware_JR2026902