Description
We're seeking a Senior STA Signoff Methodology Engineer to drive sign-off strategies for GPUs, CPUs, LPUs, and SoCs. You'll optimize performance, yield, and reliability through modeling, analysis, and automation. Your work will impact the next-gen AI landscape across NVIDIA's product lines.
Job Overview: As an NVIDIAN, you'll work in a diverse environment where everyone is inspired to do their best work. You'll join a team pushing the frontiers of what's possible today and defining the platform for the future of computing.
Responsibilities:
- Run large-scale SPICE simulations and STA experiments to model advanced technologies' impact on chip timing.
- Develop STA and PNR flows and recommendations addressing aging, self-heating, thermal effects, IR drop, electro migration, and other advanced-node physical effects.
- Collaborate with technology leads, physical-design engineers, and timing engineers to define and deploy sophisticated timing-signoff strategies.
- Develop tools and methodologies that improve design performance, predictability, and silicon reliability.
- Work across STA, constraints, and timing and power optimization.
- Perform extensive data analysis using Python, JMP, or similar tools to improve STA-to-silicon correlation.
Requirements:
- MS in Electrical or Computer Engineering, or equivalent experience, with 8 years of experience in ASIC design and timing.
- Solid understanding of RC extraction, device physics, STA methodologies, and EDA-tool limitations.
- Proven foundation in the mathematics and physics underlying electrical design.
- Experience with low-power techniques, including multi-Vt design, clock gating, power gating, activity-based power analysis, DVFS, and CDC.
- Understanding of signal and power integrity, crosstalk, electromigration, noise, OCV, timing margins, clock jitter, and IR drop.
- Understanding of standard-cell, memory, and I/O IP modeling and their use in ASIC flows.
- Hands-on experience with advanced FinFET and emerging CMOS technologies at 5 nm, 3 nm, 2 nm, and beyond.
- Familiarity with industry-standard ASIC tools such as PrimeTime, ICC2, RedHawk, and Tempus.
- Strong communication skills and a collaborative working style.
Benefits: NVIDIA offers highly competitive salaries and a comprehensive benefits package. You will also be eligible for equity and benefits. See what we can offer to you and your family at [www.nvidiabenefits.com](http://www.nvidiabenefits.com).
How to Stand Out:
- Familiarity with 3D IC integration, die stacking and packaging, self-heating, and their impact on timing closure.
- Strong data-analysis and modeling skills employing Python, JMP, or similar platforms.
- Proficiency in Tcl and Python; C++ experience is a plus.