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NVIDIA

Versatile Engineer, HW ArchDev Methodology

NVIDIA
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hybrid mid full-time $116,000 - $189,750 for Level 2, and $136,000 - $218,500 for

First indexed 11 Sept 2026

Description

NVIDIA Silicon Co-design Group is seeking a versatile engineer to join the HW ArchDev Methodology team. The team operates across the full product lifecycle, from early architecture definition through silicon bring-up to production, providing a unique end-to-end perspective on next-generation systems.

You will define how validation is done for chips that don't exist yet. The HW ArchDev Methodology team sits at a rare intersection of architecture, silicon bring-up, and production. You will build validation strategies, automation frameworks, and telemetry systems that determine whether next-generation GPUs and AI accelerators ship on time and at quality.

Responsibilities:

  • Design system-level validation strategies for complex architectures, corner cases, PVT, large-scale behavior, and feature interactions
  • Build AI-assisted and data-driven validation workflows that improve coverage, debug turnaround, and efficiency
  • Profile real workloads, including training, inference, HPC, video, and emerging applications
  • Deploy automation and telemetry pipelines that scale across products and teams
  • Drive silicon bring-up and root-cause debug with reusable, high-leverage methods

Requirements:

  • BS/MS in Electrical Engineering or Computer Engineering (or equivalent experience)
  • 2+ years in silicon bring-up, ASIC validation, or system-level debug
  • Grounding in PVT, timing (STA), signal integrity, power, and high-speed IO (PCIe, chip-to-chip)
  • Understanding of firmware/driver-hardware interaction
  • Experience or curiosity around data-driven workflows, telemetry, and AI/LLM-assisted development
  • Thrive in a collaborative environment

Preferred Qualifications:

  • You've applied AI/ML or LLMs to validation, debug automation, or workload analysis
  • You've built infrastructure others still use, such as pipelines, observability systems, or debug tools
  • You have artifacts, such as postmortems, test methods, tools, papers, or dashboards that show how you think
  • You've driven cross-functional work across architecture, firmware, validation, and manufacturing

The base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is $116,000 - $189,750 for Level 2, and $136,000 - $218,500 for Level 3. You will also be eligible for equity and benefits.

This listing is enriched and indexed by YubHub. To apply, use the employer's original posting: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Silicon-Validation-Engineer_JR2022641