VLSI Physical Design Engineer (RDSS Intern)

We are seeking a VLSI Physical Design Engineer (RDSS Intern) to join our team in Taiwan, Hsinchu Office. As a VLSI Physical Design Engineer, you will be responsible for all aspects of physical design (Netlist to GDSII & Flow development) of all chips at NVIDIA.

Responsibilities:

• Work on floorplan (from top level to block level)
• Power/clock distribution
• Placement, routing (from top level to block level)
• Timing/power/noise/DFM optimization and analysis
• Chip assembly, and physical verification
• Flow automation, regression testing
• Collaborate with EDA vendors on tool evaluation and improvement
• Develop in-house tools and solutions

Requirements:

• MS in Microelectronics, EE, CS, or related major
• Courses taken in IC design or digital circuit design
• Knowledge of chip design, Place&Route

Nice to Have:

• Project experience in IC design or ASIC design
• Hands-on experience in EDA tools (Place&Route, physical design, timing analysis, circuit simulation or layout)
• Familiarity with Perl/Python/Tcl/Shell scripting

NVIDIA offers competitive salaries and a generous benefits package.