Senior Staff Engineer, Custom IC Layout

Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining software used in chip design, verification and manufacturing.

As a Senior Staff Engineer, Custom IC Layout, you will work directly with the largest semiconductor companies in Korea on the most advanced nodes in production today.

What You'll Be Doing

• Own Custom Compiler technical engagement at leading Korean foundry, memory, and fabless customers, driving tool deployment, methodology adoption, and advanced-node enablement on their most critical custom layout projects
• Lead on-site debug and root-cause analysis for blocker issues, working directly with customer layout teams and Synopsys R&D to deliver patches, workarounds, and hotfixes aligned to customer tapeout schedules
• Develop and validate node-to-node and fab-to-fab analog IP migration methodologies, building production-ready flows that scale across multiple process nodes and customer design environments
• Drive adoption of layout synthesis using ASO.ai and other Synopsys.ai solutions, integrating them into customer workflows and proving out ROI on real customer designs
• Build and deliver methodology decks, application notes, training materials, and customer-facing workshops that translate complex tool capabilities into actionable flows for layout engineers
• Validate new Custom Compiler features on customer reference designs at advanced nodes, providing feedback to R&D on what works, what breaks, and what needs to change before general release
• Partner with field application teams and R&D to define product roadmap priorities based on direct customer engagement, ensuring that what we build next is what these customers actually need

The Impact You Will Have

• Enable leading Korean foundry, memory, and fabless customers to adopt Custom Compiler and layout synthesis on their most advanced nodes, directly accelerating their time to tapeout and reducing manual layout effort
• Unblock critical customer tapeouts by resolving tool and methodology issues that would otherwise delay production schedules by weeks or months
• Build migration flows that allow customers to reuse analog IP across nodes and fabs, protecting millions of dollars in prior design investment and reducing redesign cycles
• Shape the Custom Compiler product roadmap by feeding real customer requirements and pain points directly into R&D, ensuring that future releases solve the problems that matter most to our largest accounts
• Establish Synopsys as the trusted technical partner for custom layout at Korea's leading semiconductor companies, strengthening customer relationships and driving long-term tool adoption
• Accelerate industry adoption of AI-driven layout synthesis by proving out ASO.ai on production designs, demonstrating measurable productivity gains that change how layout teams work
• Train and enable dozens of customer layout engineers through workshops and direct engagement, multiplying your impact across entire design organizations

What You'll Need

• BS, MS, or PhD in Electrical Engineering, Computer Engineering, or related field
• 7+ years of hands-on experience in custom IC layout for analog, mixed-signal, memory, standard cell, or IP blocks, or in EDA Product Engineering or Application Engineering supporting custom layout tools
• Proficiency with Synopsys Custom Compiler or Cadence Virtuoso, including deep familiarity with layout editors, design rule checking, LVS flows, and parasitic extraction
• Strong understanding of advanced-node design rules, physical verification flows, and parasitic-aware layout techniques for advanced-node
• Scripting capability in SKILL, Python, or Tcl, with comfort working in Linux/Unix environments to automate flows and debug tool issues
• Fluency in Korean and strong English communication skills, with the ability to present technical content to customer executives and lead workshops for engineering teams
• Experience with analog IP migration across process nodes or foundries, or hands-on work with layout synthesis tools, is a strong differentiator