Sr Staff Engineer - Analog Design

You will work as a Sr Staff Engineer - Analog Design at Synopsys, designing and developing cutting-edge semiconductor solutions. Your expertise in analog circuits will contribute to creating Multi-Gbps SERDES IP for data centers, automotive networks, and AI accelerators.

Responsibilities

• Review high-speed SerDes standards including PCIe, Ethernet, USB, and CXL, and translate them into transceiver architectures and detailed sub-block specifications for Multi-Gbps NRZ and PAM4 designs
• Architect and design analog and mixed-signal circuits including TX drivers, RX front-ends, adaptive equalizers, PLLs, DLLs, bandgap references, regulators, oscillators, and ADC/DAC blocks for advanced FinFET and gate-all-around process nodes
• Collaborate with digital design teams on analog and digital co-design, calibration loops, adaptation algorithms, and timing handoff to ensure seamless integration and optimal performance
• Work directly with layout engineers to guide physical implementation, minimize parasitics, manage device stress and process variation, and ensure robust post-silicon performance
• Present simulation results, design trade-offs, and architectural decisions in internal reviews, customer meetings, and industry panel discussions
• Document design features, simulation methodologies, test plans, and characterization results, and support post-silicon bring-up and debug with electrical analysis and design iteration proposals
• Analyze customer silicon data and field performance to identify improvement opportunities and drive post-silicon design updates for next-generation IP releases

The Impact You Will Have

• Define the architectural direction for Synopsys SERDES IP, influencing product roadmaps and enabling next-generation connectivity standards across automotive, data center, and AI markets
• Deliver power, performance, and area improvements that directly affect the competitiveness of Synopsys IP in advanced process nodes and high-speed communication applications
• Solve post-silicon challenges that unblock customer tape-outs and ensure successful deployment of Synopsys IP in high-volume production chips
• Mentor analog designers across the team, raising the technical bar for circuit design, simulation methodology, and design-for-reliability practices
• Strengthen Synopsys leadership in Multi-Gbps SERDES by contributing to industry standards bodies, customer engagements, and technical publications
• Enable faster time-to-market for customers by streamlining design and verification flows and reducing silicon respins through robust pre-silicon validation
• Shape the future of high-speed analog design at Synopsys by driving advances in adaptive equalization, low-power PLLs, and signal integrity for next-generation process technologies

Requirements

• MTech or MS with 8+ years or BTech or BS with 10+ years of hands-on analog IC design experience in Electrical Engineering, Computer Engineering, or a related field
• Proven track record of CMOS tape-outs in FinFET technologies with demonstrable experience in Multi-Gbps high-speed designs using NRZ and PAM4 modulation
• Deep expertise in SERDES sub-circuit design including TX drivers, RX front-ends, adaptive equalizers, PLLs, DLLs, bandgap references, regulators, oscillators, and data converters
• Strong understanding of analog and digital co-design, calibration and adaptation algorithms, and timing handoff between analog and digital domains
• Proficiency with schematic entry, physical layout collaboration, design verification tools, and SPICE simulators such as Spectre or HSPICE
• Experience with scripting languages such as TCL, PERL, or MATLAB for post-processing simulation data and automating design tasks
• Solid grounding in system-level budgeting for jitter, amplitude, and noise, and familiarity with signal integrity challenges including packaging parasitics, crosstalk, and channel loss. Experience with ESD protection, custom digital design, and design-for-reliability considerations such as electromigration, IR drop, aging, and self-heating is a plus

Benefits

• Comprehensive medical and healthcare plans
• Time away programs including ETO and FTO
• Family support including maternity and paternity leave, parenting resources, adoption and surrogacy assistance
• ESPP to purchase Synopsys common stock at a 15% discount
• Retirement plans varying by region and country
• Competitive salaries