Description
Compensation
The base pay offered may vary depending on multiple individualized factors, including market location, job-related knowledge, skills, and experience. The salary range for this role is $266K – $445K, with generous equity, performance-related bonuses for eligible employees, and the following benefits.
Benefits include:
- Medical, dental, and vision insurance for you and your family, with employer contributions to Health Savings Accounts
- Pre-tax accounts for Health FSA, Dependent Care FSA, and commuter expenses (parking and transit)
- 401(k) retirement plan with employer match
- Paid parental leave (up to 24 weeks for birth parents and 20 weeks for non-birthing parents), plus paid medical and caregiver leave (up to 8 weeks)
- Paid time off: flexible PTO for exempt employees and up to 15 days annually for non-exempt employees
- 13+ paid company holidays, and multiple paid coordinated company office closures throughout the year for focus and recharge, plus paid sick or safe time
- Mental health and wellness support
- Employer-paid basic life and disability coverage
- Annual learning and development stipend to fuel your professional growth
- Daily meals in our offices, and meal delivery credits as eligible
- Relocation support for eligible employees
- Additional taxable fringe benefits, such as charitable donation matching and wellness stipends
About the Team
OpenAI's Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. The team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models.
About the Role
You will work on the systems software strategy and execution that brings new AI silicon from first power-on to a fully integrated system running production-representative models at expected functionality and performance. You will define how software exercises and validates compute, memory, interconnect, and I/O subsystems, then build the diagnostics, automation, and observability needed to find issues quickly.
Responsibilities
- Contribute to the end-to-end software bringup and validation strategy for new silicon and first-party systems.
- Define software-driven test coverage across compute, memory, interconnect, I/O, and their system-level interactions.
- Build diagnostics, test automation, telemetry, and regression infrastructure that accelerate first-silicon learning and issue isolation.
- Lead bringup from initial silicon arrival through board and system integration, docking, runtime enablement, and model execution.
- Design stress tests that characterize reliability, performance, and stability across workloads and operating conditions.
- Translate architecture specifications and performance models into measurable acceptance criteria, coverage goals, and pass/fail signals.
- Debug complex hardware-software failures, drive root-cause analysis, and coordinate fixes across silicon, firmware, electrical, platform, and workload teams.
- Validate that integrated systems deliver expected functionality and model performance, and turn bringup learnings into reusable infrastructure for future generations.
Requirements
- Strong systems programming experience in C, C++, Rust, Python, or comparable low-level environments.
- Experience bringing up or validating complex silicon, accelerators, servers, or other hardware-software systems.
- Understanding of computer architecture and the behavior of compute, memory, interconnect, and I/O subsystems.
- Low-level debugging skills across firmware, drivers, operating systems, and hardware interfaces.
- Ability to create a rigorous test strategy, reason about coverage gaps, and build scalable automation and observability.
- Experience with performance characterization, stress testing, reliability testing, or production readiness.
- Clear communication across disciplines and ability to drive ambiguous, high-stakes technical work from plan through closure.
- Passion for building durable tools and processes that make subsequent bringup cycles faster and more predictable.