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Synopsys

RTL Design Engineer

Synopsys
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senior employee $138000-$208000 Boxborough, Massachusetts

First indexed 2 Oct 2026

Description

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

You are a highly experienced IC Design Engineer with a passion for pushing the boundaries of technology. With a PhD and over 10 years of practical analog IC design experience or an MSc with 12+ years, you possess extensive experience in FinFET technologies and a deep understanding of sub-circuits relevant to Memory, SerDes, and D2D. You are proficient in designing receive equalizers like CTLE, DFE, and FFE, and have expertise in DAC-based transmitters, ADC-based receivers, and DSP equalization. Your skills in high-speed clocking circuits such as PLL, VCO, ILO, DLL, and phase interpolator are exceptional. You are familiar with duty cycle correction, clock phase correction circuits, and digitally assisted analog calibration loops.

In-depth familiarity with transistor-level circuit design, sound CMOS design fundamentals, and experience with CMOS tape-outs are part of your skill set. You have a thorough knowledge of high-speed SerDes, Memory, D2D IO, and the associated circuit and fabrication issues that impact customer use-cases directly. ESD issues, custom digital design, and analog/digital interactions for optimizing circuit performance are well within your expertise. You are well-versed in design for reliability, layout effects, and the tools for schematic entry, physical layout, and design verification. Your proficiency with SPICE simulators and scripting languages like TCL, Perl, C, Python, and MATLAB is notable. Excellent communication, presentation, and documentation skills round out your profile.

Responsibilities:

  • Reviewing UCIe and other D2D standards to develop novel transceiver architectures and sub-block specifications.
  • Investigating and developing circuit architectures that address architectural bottlenecks and lead to revolutionary improvements in power, area, and performance targets.
  • Collaborating across geography, project, and department teams to streamline design and verification strategies, ensuring overall design quality, efficiency, and performance.
  • Overseeing PHY level physical layout to minimize the effect of parasitics, device stress, and process variation.
  • Presenting and reviewing simulation data from internal project teams, and presenting results externally at industry panels or customer reviews.
  • Documenting design features and test plans, consulting on the overall electrical characterization of the D2D IP product, analyzing customer silicon data for design enhancements, and proposing solutions for post-silicon design updates.

The Impact You Will Have:

  • Driving the development of cutting-edge transceiver architectures that set new benchmarks in power, area, and performance.
  • Enhancing overall design quality and efficiency through cross-functional collaboration and streamlined verification strategies.
  • Minimizing the effects of parasitics, device stress, and process variation through meticulous oversight of PHY level physical layout.
  • Contributing to the industry by presenting simulation data and results at panels and customer reviews, establishing Synopsys as a thought leader.
  • Ensuring the robustness and reliability of D2D IP products through detailed documentation and electrical characterization.
  • Driving post-silicon design updates and enhancements based on customer silicon data, ensuring continuous improvement and alignment with customer needs.

Requirements:

  • PhD with 8+ years, or MSc with 10+ years of practical analog IC design experience.
  • Experience with FinFET technologies and in-depth familiarity with transistor-level circuit design.
  • Extensive design experience with sub-circuits relevant to Memory/SerDes/D2D, including receive equalizers, DAC-based transmitters, and high-speed clocking circuits.
  • Knowledge of ESD issues, custom digital design, and analog/digital interactions for optimizing circuit performance.
  • Proficiency with tools for schematic entry, physical layout, design verification, and SPICE simulators, as well as scripting languages like TCL, Perl, C, Python, and MATLAB.

Benefits:

  • Comprehensive medical and healthcare plans that work for you and your family.
  • Time away programs, including ETO and FTO.
  • Family support, including maternity and paternity leave, parenting resources, adoption and surrogacy assistance.
  • ESPP: purchase Synopsys common stock at a 15% discount.
  • Retirement plans that vary by region and country.
  • Competitive salaries.
This listing is enriched and indexed by YubHub. To apply, use the employer's original posting: https://careers.synopsys.com/job/boxborough/rtl-design-engineer/44408/101381296128