Physical Design STA CAD Engineer

NVIDIA is looking for a Physical Design STA CAD Engineer to join its Networking Silicon engineering team, developing high-speed communication devices with the highest throughput and lowest latency.

You will develop physical design, STA, Logic eq, Power Integrity flows and methodologies for implementing networking chips and SOCs.

Key responsibilities include:

• Working closely with block owners and full Chip STA engineers to ensure high-quality and timely convergence
• Creating unique solutions to state-of-the-art physical design problems
• Participating in and developing flow and tool methodologies for timing analysis and closure, power and noise analysis, IR-drop, EM and back-end verification

Requirements:

• B.Sc./M.Sc. in Electrical Engineering/Computer Engineering (or equivalent experience)
• 2+ years of full-time relevant experience in Physical Design, Backend CAD, STA and Timing closure methodologies
• Proven experience with industry-standard tools like PrimeTime and PrimePower
• Self-motivation, attention to detail, and good written, verbal, and presentation skills

Preferred qualifications:

• Experience in Signoff domains: STA, Power Estimation, Power Integrity, Formal eq.
• Knowledge of Tcl/Perl/Python
• Versatility and teamwork skills

NVIDIA offers a meaningful, growing, and highly professional environment where you can make a significant impact.