Skip to content
Updated How AI-exposed are the skills employers are hiring for? See the data →

From the employer's careers site First seen 27 Oct 2026 · Still live on 31 Oct 2026

Layout Design, Staff Engineer

The employer hasn't listed a salary.

Apply on Synopsys

Description

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

We are looking for a Staff Engineer to join our SerDes PHY IP firmware team and work alongside fellow engineers on PCS/PMA firmware for our next-generation SerDes PHY IP, supporting multiple protocols such as PCIe, Ethernet, and MIPI M-PHY. This is a senior individual-contributor role focused on hands-on firmware design and development, silicon bring-up, and customer issue resolution as a core member of the team.

Responsibilities

  • Develop firmware for next-generation SerDes PHY IP supporting multiple protocols, including PCIe, Ethernet, and MIPI M-PHY.
  • Design and maintain firmware for PHY startup, offset calibration, and adaptation flows.
  • Analyze and debug interactions between firmware, analog/mixed-signal front-end circuits, and digital PCS/PMA blocks.
  • Collaborate closely with systems, analog design, digital design, verification, and lab teams during firmware development and debugging.
  • Support and enhance existing firmware applications and features.
  • Develop and maintain firmware development infrastructure and tools.
  • Develop and improve firmware documentation to enhance customer usability and support.
  • Investigate and resolve customer-reported firmware issues and failures.
  • Lead firmware integration, debugging, and silicon bring-up activities on assigned areas.
  • Contribute to improvements in firmware design methodologies and system-level architecture through collaboration with cross-functional teams.

The Impact You Will Have

  • Advance the development of high-performance firmware for next-generation technologies.
  • Enhance the functionality and reliability of Synopsys' SerDes PHY IP products.
  • Optimize system performance through post-silicon bring-up, characterization, and debugging activities.
  • Improve customer satisfaction through robust firmware solutions and comprehensive documentation.
  • Drive innovation in firmware design methodologies and system-level architecture.
  • Collaborate with cross-functional teams to deliver integrated solutions that push the boundaries of technology.

Requirements

  • Bachelor's, Master's, or PhD degree in Computer Engineering, Electrical Engineering, or a related field, or equivalent industry experience.
  • 8+ years of experience in a related field.
  • Understanding of both digital logic and firmware/software development, with in-depth specialization in either.
  • Hands-on experience with assembly-level firmware development for embedded controllers or custom PHY sequencer ISAs.
  • Working knowledge of high-speed SerDes fundamentals and familiarity with at least one high-speed SerDes standard (e.g., PCIe, Ethernet, MIPI M-PHY, USB, or DisplayPort).
  • Experience with structured firmware development, verification, and documentation processes.
  • Familiarity with embedded software toolchains, including cross-compilers, assemblers, and on-target debuggers.
  • Ability to read and debug Verilog RTL (e.g., PHY FSM/sequencer RTL) to reason about firmware-hardware interactions.
  • Business-level English communication skills, both written and verbal, to work effectively with global cross-functional teams and customers.

Preferred Qualifications

  • Deep expertise in PCIe, Ethernet, or MIPI M-PHY protocol layers.
  • Experience with multi-protocol SerDes PHY architectures.
  • RTL design or verification experience.
  • Scripting experience with Perl, Python, Bash, or Csh.
  • Silicon bring-up and lab debugging experience, including waveform tools (e.g., Verdi/FSDB), scopes, or BER testers.
  • Experience developing DSP microcode or firmware for other custom-ISA processors beyond PHY sequencers.
  • Experience with Perforce or Git-based version control workflows.
  • Experience using AI-assisted development tools for code review, documentation, or test generation.

Benefits

  • Comprehensive medical and healthcare plans that work for you and your family.
  • In addition to company holidays, we have ETO and FTO Programs.
  • Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
  • Purchase Synopsys common stock at a 15% discount, with a 24-month look-back.
  • Save for your future with our retirement plans that vary by region and country.
  • Competitive salaries.

Skills

Required

Nice to have

  • PCIe protocol layers
  • multi-protocol SerDes PHY architectures
  • RTL design
  • verification experience
  • Perl
  • Python
  • Bash
  • Csh
  • waveform tools
  • Git-based version control workflows
  • AI-assisted development tools

Ready to apply?

You apply with the employer directly. Their original posting is here: https://careers.synopsys.com/job/seongnam-si/layout-design-staff-engineer/44408/102448659760

Apply on Synopsys