ATE Test Engineer, Sr Staff Engineer

You will work on memory interface IP that powers real customer products, determining whether that IP ships on time and works in the field.

Key Responsibilities:

• Develop and execute ATE test programs on platforms like Introspect, Teradyne, Advantest, or Credence for memory interface IP including DDR, LPDDR, and HBM
• Perform electrical characterisation using oscilloscopes, BERTs, and network analysers to capture time-domain signals, eye diagrams, and jitter analysis on production silicon
• Debug complex mixed-signal systems including PLLs, DLLs, DACs, and state machines to isolate failures across silicon, firmware, board, and test setup
• Validate IP against JEDEC specifications and automotive qualification standards including HTOL, ELFR, and reliability testing protocols
• Generate technical documentation and validation reports that translate silicon behaviour into actionable recommendations for design, firmware, and customer teams
• Collaborate with design and firmware teams during silicon bring-up to identify and resolve issues before production release
• Mentor junior validation engineers through characterisation projects, test program development, and lab equipment usage

The Impact You Will Have:

• Your validation work will determine whether Synopsys memory IP meets timing, signal integrity, and reliability requirements before customer deployment
• You will catch silicon issues early in the validation cycle, reducing costly re-spins and accelerating time to market for new IP releases
• Your ATE programs will become the production test foundation for high-volume manufacturing, directly affecting yield and quality
• Your characterisation data will inform design decisions for next-generation memory interface IP
• Your mentorship will build validation capability in the Nepean lab, enabling the team to scale alongside the IP portfolio
• Your documentation will serve as the technical record that supports customer engagements, qualification processes, and internal design reviews
• Your ability to isolate root cause across disciplines will prevent validation bottlenecks and keep silicon programs on schedule

Requirements:

• Bachelor's or Master's degree in Electrical Engineering or equivalent technical field
• 8+ years of hands-on experience in silicon validation, ATE programming, or mixed-signal test engineering
• Proven experience programming ATE platforms such as Teradyne, LTX, Advantest, Credence, or Introspect
• Proven experience debugging and bringing up new benchtop test equipment for IO characterisation
• Deep working knowledge of DDR, LPDDR, and HBM protocols and JEDEC specifications
• Strong analog and mixed-signal circuit knowledge with the ability to analyse verification and simulation waveforms
• Expertise using oscilloscopes, BERTs, network analysers, and other advanced lab equipment for electrical characterisation
• Expertise in reading VB code
• Experience with jitter analysis, timing validation, pulse-width measurements, and reliability testing including HTOL and ELFR is a strong plus
• Familiarity with automotive qualification standards is a strong plus

Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.