Director, Advanced Interface Technologies

You are an expert professional with years of experience in analog and mixed-signal design, specifically in building SerDes, PLLs, CDRs, high-speed interfaces, and you know what it takes to get them working not just in simulation, but in silicon, in a customer's system, under real conditions.

At Synopsys, you will shape the future of PCIe Gen7, Gen8, and AI-driven design methodologies that matter across the industry. You take ownership of technology roadmap ownership, cross-organizational influence, and development of future leaders and you lead by influence as much as authority.

Responsibilities

• Lead analog and mixed-signal design teams working on high-speed interfaces including PCIe Gen7, Gen8, SerDes, PLLs, CDRs, ADC/DAC, and power management IP.
• Review and guide design architectures, evaluate performance tradeoffs, and solve complex technical challenges across active projects.
• Drive the adoption of AI-driven design methodologies, predictive modeling, simulation acceleration, and automation tools to improve engineering productivity.
• Build, mentor, and grow teams of engineers, technical leads, and managers across multiple sites, fostering accountability and technical excellence.
• Align cross-functional teams including analog, digital, layout, verification, CAD, methodology, and product engineering to remove bottlenecks and drive execution.
• Lead customer engagements, technical reviews, and escalations with strategic customers, translating their needs into actionable engineering solutions.
• Own strategic programs from concept through deployment, including resource planning, risk management, and delivery across the organization.

The Impact You Will Have

• Define the technical roadmap for next-generation PCIe and SerDes technologies powering AI, data center, networking, and high-performance computing platforms.
• Accelerate time to market and improve product quality by championing AI-assisted design workflows and engineering automation across the organization.
• Build and retain top engineering talent, creating an environment where engineers work on industry-leading connectivity solutions that shape the future.
• Influence investment priorities and strategic decisions that position Synopsys as a leader in high-speed interface IP.
• Drive measurable improvements in design efficiency, silicon success rates, and customer satisfaction across multiple product lines.
• Establish best practices and common methodologies that scale across global teams and improve collaboration.
• Deliver innovations that directly improve the competitiveness and profitability of Synopsys IP offerings.

Requirements

• Bachelor's or Master's in Electrical Engineering, Electronics Engineering, or related field with 12+ years of analog/mixed-signal IC design experience.
• Proven track record managing engineering teams and delivering complex analog IP products to production, including SerDes, high-speed interfaces, or related technologies.
• Deep technical expertise in analog design fundamentals, high-speed signaling, PLL/CDR architectures, or power management circuits.
• Experience driving cross-functional initiatives across analog, digital, layout, verification, and product engineering teams in a multi-site environment.
• Demonstrated ability to lead customer engagements, technical reviews, and escalations with strategic customers.
• Strong technical judgment to evaluate architecture tradeoffs, manage risk, and make decisions balancing performance, schedule, quality, and cost.
• Experience with AI-driven design methodologies, automation, or engineering productivity initiatives is a strong plus.

Benefits

• Comprehensive medical and healthcare plans that work for you and your family.
• In addition to company holidays, we have ETO and FTO Programs.
• Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
• Purchase Synopsys common stock at a 15% discount, with a 24-month look-back.
• Save for your future with our retirement plans that vary by region and country.
• Competitive salaries.