Senior Silicon Power, Thermal Validation and Methodology Engineer

As a Senior Silicon Power, Thermal Validation and Methodology Engineer at NVIDIA, you will work on problems that sit at the boundary of architecture, silicon, firmware, software, and production. You will help build the bridge between power and thermal design and executable productization methodology.

The Silicon Design for Productization (DFP) Team, within the broader Silicon Co-Design Group, turns power and thermal design into executable productization methodology. Power and thermal are among the most complicated problems worked on at NVIDIA because they sit at the intersection of architecture, workload behavior, silicon variation, firmware policy, platform constraints, and product goals.

Responsibilities:

• Lead the effort across multi-functional teams to keep the program's power and thermal productization strategy clear, executable, and on track.
• Create methodology and silicon test plans based on controller designs and architecture, including characterization processes, debug tools, fuse/firmware settings, and lab requirements.
• Drive resolution for challenging silicon issues through structured hypotheses, measurement plans, and root-cause closure.
• Steward the Power and Thermal playbook when the existing productization methodology does not fit the problem, creating new mitigations and assembling them as reusable methods.
• Build AI-enabled workflows to automate data analysis, metric extraction, trend checks, and report generation across multiple bring-ups to improve, leverage, and shorten time to market.
• Serve as a key technical owner for multi-functional decisions, issues, and trade-offs related to feature bring-up.

Requirements:

• BS or MS in Electrical Engineering, Computer Engineering, or a related field, or equivalent experience.
• 8+ years of proven track record in post-silicon bring-up and validation of power and thermal features on sophisticated ASIC or SoC programs.
• Strong end-to-end understanding of silicon behavior across architecture, firmware, validation, and platform interactions, with expertise in power and thermal domains.
• Evidence of creating/improving characterization documents, debug tools, dashboards, or other reviewable technical artifacts.
• Demonstrated ability to make sound trade-off decisions across power, thermal, performance, firmware, design, validation, and schedule constraints.
• Shown experience building or applying AI-enabled workflows for silicon characterization or validation, with measurable workflow impact and clear validation difficulty, observability, and guardrails.

Benefits:

• Equity
• Benefits