Senior Package Layout Engineer

NVIDIA is seeking a Senior Package Layout Engineer to join their team. The successful candidate will collaborate with Technical Package Lead and different design teams in the design and development of sophisticated, detailed layout of IC substrates for NVIDIA products.

Responsibilities:

• Collaborate with the Layout team to implement high-speed/density ASIC packages
• Perform substrate breakout patterns for ASIC packages
• Optimize package pinout incorporating system-level trade-offs of pins assignment
• Help perform package routing, placement, stack-up, reference plane, and power distribution using Cadence APD or SiP tool suite
• Propose layout design trade-offs to the Technical Package Lead for resolution and implementation
• Conduct design feasibility studies to evaluate the Package design goals for size, cost, and system performance
• Develop symbols and CAD library databases using Cadence APD design tools
• Develop methodologies to improve layout productivity

Requirements:

• Hold a B.S. Electrical Engineering or equivalent experience
• 5+ years of experience in PCB Layout of graphics cards, motherboards, line cards, or other related technology
• Proven experience in substrate layout of wire bond and flip chip packages is preferred
• Significant background with Cadence APD or SiP and/or PCB layout tools (including Constraint Manager)
• Solid understanding of high-speed design signal integrity practices
• Experience with Virtuoso and Calibre is a plus
• Experience using Valor is helpful