Description
Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining software used in chip design, verification and manufacturing. They work on assignments like designing, developing, and troubleshooting software, leveraging the state-of-the-art technologies like AI/ML, GenAI and Cloud. Their critical contributions enable world-wide EDA designers to extend the frontiers of semiconductors and chip development.
You have spent years building and validating semiconductor libraries that have to work in production, not just pass a test suite. You know that a library view delivered without proper power modeling or incomplete validation creates a cascade of problems for design teams three months later, and you are the kind of engineer who catches those gaps before they ship. You think in terms of flows, not just files. When you see a library deliverable, you are already mapping the characterization chain, the build dependencies, the APL model generation steps, and the release checkpoints that need to happen for it to land correctly.
At Synopsys, you will work on libraries and power models that enable real chips to tape out. The work is technical, the standards are high, and what you validate matters.
Responsibilities
- Create and validate library views across multiple formats and technology nodes to support diverse design and signoff requirements
- Develop, validate, and package library deliverables for internal teams and external customer releases, ensuring completeness and correctness
- Generate and validate Apache Power Library models including SPIPROF, Current, CDEV, and PWCDEV for power integrity and signoff flows
- Execute comprehensive quality checks across library builds, APL models, and release packages to catch issues before they reach downstream users
- Debug and resolve complex issues in characterization flows, APL model generation, build validation, and release processes
- Build and maintain Python and Shell automation to improve validation coverage, reduce manual effort, and increase release velocity
- Collaborate with characterization, design, CAD, QA, and release teams to align on requirements, troubleshoot blockers, and deliver on schedule
The Impact You Will Have
- Enable design teams and customers to meet tape-out schedules by delivering high-quality, validated library deliverables on time
- Reduce downstream design issues by catching library and APL model inconsistencies early through rigorous validation
- Accelerate release cycles by building automation that replaces manual validation steps and improves flow reliability
- Improve power signoff accuracy by delivering validated SPIPROF, CDEV, and PWCDEV models that reflect real silicon behavior
- Drive quality improvements across the library development pipeline by identifying gaps in validation coverage and closing them
- Solve customer-reported library and APL issues quickly, reducing support escalations and maintaining customer trust
- Contribute to continuous improvement efforts that make validation flows faster, more robust, and easier to maintain
Requirements
- Bachelor's or Master's in Electronics Engineering, Computer Science, or equivalent practical experience
- 5+ years of hands-on experience in library development, validation, or characterization for semiconductor IP or EDA flows
- Strong proficiency in Python and Shell scripting for automation, validation, and workflow orchestration
- Deep understanding of library views, formats, and their role in digital and custom design flows
- Experience with Apache Power Library models such as SPIPROF, Current, CDEV, or PWCDEV is a strong plus
- Solid debugging skills across complex multi-step flows involving characterization, model generation, and release processes
- Ability to work across teams and communicate technical issues clearly to design, CAD, QA, and release stakeholders
Benefits
- Comprehensive medical and healthcare plans that work for you and your family
- Time away: company holidays, ETO and FTO Programs
- Family support: maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more
- ESPP: purchase Synopsys common stock at a 15% discount, with a 24-month look-back
- Retirement plans: save for your future with our retirement plans that vary by region and country
- Competitive salaries