Senior UCIe Applications Engineer-18808

You are an experienced Applications Engineer who brings deep technical credibility, strong customer instincts, and the ability to lead through complexity. With experience in design, verification, implementation, validation, or applications engineering, you have built strong expertise in ASIC Front-End or Back-End development and know how to guide customers through demanding integration challenges.

You will help customers integrate UCIe IP throughout the SoC flow and support silicon and system bring-up. Some travel is required.

Responsibilities:

• Understand IIP applications within customer-specific SoCs and systems, and provide expert guidance to configure, integrate, and resolve challenges across simulation, synthesis, floor planning, STA, DFT, silicon bring-up, and system integration
• Lead customer integration reviews, support major SoC milestones, and drive root-cause analysis and resolution for complex technical issues
• Partner with R&D teams to develop application notes, improve deployment methodologies, and participate in design reviews that align future development with customer needs and deployment learnings
• Build trusted relationships with customer engineering teams and influence technical implementation decisions

The Impact You Will Have:

• Drive successful integration and deployment of Synopsys UCIe IP across complex ASIC and SoC programs while helping customers accelerate adoption and overcome critical integration challenges
• Build trust with customer engineering teams through technical leadership, consistent execution, and strong methodology guidance
• Influence product quality, usability, and long-term customer success through actionable feedback from customer deployments

Requirements:

• BSEE, BSCE, BSCS or MSEE, MSCE, MSCS degree plus 8 years of experience in design, verification, implementation, validation, applications engineering, or a related field, along with hands-on experience in ASIC Front-End or Back-End development
• Demonstrated ability to independently lead customer technical discussions and engagements, with domain knowledge in die-to-die and PCIe/CXL protocol
• Silicon, FPGA, or hardware debug and troubleshooting experience, plus knowledge of advanced EDA tools and expertise in place-and-route, physical verification, signal integrity, or power integrity
• Experience with mixed-signal IP or circuit design; experience with advanced technology nodes such as 10nm, 7nm, 5nm, or 3nm is a plus