Staff Engineer, SRAM Memory

Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining software used in chip design, verification and manufacturing.

As a Staff Engineer, SRAM Memory, you will design embedded memories that ship in our IP portfolio and power chips across the industry. You will own circuit architecture and transistor-level implementation for ultra-high-speed, ultra-low-power, or high-density memory configurations.

Responsibilities

• Design and develop embedded CMOS memories including single-port SRAM, dual-port SRAM, register files, and ROM for Synopsys IP products
• Own circuit architecture and transistor-level implementation for ultra-high-speed, ultra-low-power, or high-density memory configurations
• Perform schematic entry, SPICE simulation, layout planning, and supervise physical layout execution through to final verification
• Develop and verify bitcells, define layout rules, and drive layout design and parasitic extraction closure with the physical design team
• Interface with CAD teams to integrate memory designs into compiler automation flows and generate EDA models for customer use
• Collaborate with frontend engineers to define and validate full verification flows including timing, power, and functional models
• Mentor junior engineers and lead technical aspects of memory design projects from concept to delivery

Requirements

• Bachelor's or Master's degree in Electrical Engineering, Electronics, or a related technical field
• Deep hands-on experience with CMOS memory circuit design including SRAM, register files, or ROM
• Proficiency with circuit simulation tools such as HSPICE, Spectre, or similar SPICE-based simulators
• Strong understanding of memory layout design, parasitic extraction, and layout verification tools like Calibre or Assura
• Scripting capability in C-Shell, Perl, or similar languages; experience with C++ or JavaScript is a plus
• Demonstrated ability to lead technical projects and mentor junior engineers through complex design challenges
• Experience working with memory compiler flows, EDA model generation, or design automation is a strong plus

Benefits

• Comprehensive medical and healthcare plans that work for you and your family
• Time away: ETO and FTO Programs
• Family support: Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more
• ESPP: Purchase Synopsys common stock at a 15% discount, with a 24-month look-back
• Retirement plans: Save for your future with our retirement plans that vary by region and country
• Competitive salaries