Description
We are seeking a Senior Silicon Manufacturing Methodology Engineer to define and implement the validation and screening of new silicon features within high-volume manufacturing flows. You will translate product requirements into executable test methodologies, infrastructure, and detailed manufacturing test plans that ensure quality, yield, and efficiency at scale.
Responsibilities:
- Own end-to-end manufacturing methodology strategy, defining organization-wide standards adopted across teams, products, and future generations
- Translate system specs and product POR into DFP requirements, test content, coverage, flows, and testability requirements
- Partner multi-functionally to implement test content, debug hooks, and screening improvements
- Turn incomplete yield, coverage, and correlation issues into hypothesis trees, measurement plans, and executable paths to closure
- Define data and analytics frameworks to support yield analysis, anomaly detection, and continuous improvement
- Lead methodology strategy and DFP documentation as the single source of truth
- Create production-standard test methods, analytics systems, and debug frameworks
- Build secure, traceable, and validated AI-assisted workflows for analysis, debug, documentation, and methodology automation
Requirements:
- BS/MS in Electrical Engineering, Computer Engineering, or related field (or equivalent experience)
- 8+ years in silicon post-silicon validation and/or high-volume manufacturing test for complex SoCs, GPUs, CPUs, or similar
- Hands-on experience with test content bring-up, limit setting, correlation to characterization, and yield/coverage optimization
- Proficiency with scripting and data analysis (e.g., Python, MATLAB, R, SQL)
- Demonstrated ability to frame ambiguous manufacturing problems and drive cross-functional alignment and closure
- Excellent communication skills and comfort authoring structured technical documents and test plans
- Strong AI-enabled skills and thinking
Benefits:
- Competitive salaries
- Generous benefits package
This listing is enriched and indexed by YubHub. To apply, use the employer's original posting:
https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/China-Shanghai/Senior-Silicon-Manufacturing-Methodology-Engineer_JR2024801