Physical Design STA Engineer

NVIDIA is looking for a Physical Design CAD Engineer to join its Networking Silicon engineering team, developing high-speed communication devices with the highest throughput and lowest latency.

You will be developing physical design, STA, Logic eq, Power Integrity flows and methodologies for implementation of networking chips and SOCs.

Key responsibilities include:

• Working closely with block owners and full Chip STA engineers to ensure high-quality and timely convergence
• Creating unique and creative solutions to physical design problems
• Participating in and developing flow and tool methodologies for timing analysis and closure, power and noise analysis, IR-drop, EM and back-end verification across multiple projects

Requirements:

• B.Sc./M.Sc. in Electrical Engineering/Computer Engineering (or equivalent experience)
• 2+ years of full-time relevant experience in Physical Design, STA, and Timing closure methodologies
• Proven experience with industry-standard tools like PrimeTime (STA) and PrimePower (Power Estimation)
• Self-motivation, attention to detail, and good written, verbal, and presentation skills
• Strong sense of ownership, self-learning skills, and ability to work independently and collaboratively

Preferred qualifications:

• Experience in Signoff domains: STA (PrimeTime), Power Estimation (PrimePower), Power Integrity (RedHawk), Formal eq. (Formality), Backend CAD
• Knowledge in Tcl/Perl/Python