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onsite mid full-time Taipei

First indexed 29 Sept 2026

Description

NVIDIA is seeking a DFT Engineer to improve verification methodology and validate large designs efficiently. The role involves verifying custom IP macros, collaborating with design and integration teams, and optimizing simulation flow.

Responsibilities:

  • Verify custom IP macros
  • Collaborate with Design, Integration, and TE teams to determine verification scope, develop strategies, implement test planning, and verify designs at IP level, cluster level, and full chip level
  • Collaborate with CAD team to optimize and smooth simulation flow
  • Generate test patterns and perform silicon bring-up

Requirements:

  • Master's degree in Electrical Engineering, Computer Engineering, or Computer Science
  • Strong debugging and analytical skills with RTL/Gate-level design tracing and verification simulation tools
  • Familiarity with SOC basic architecture
  • Understanding of Design for Testing, including Scan, ATPG, BIST, and JTAG, is a plus
  • Skills in Python, Perl, Tcl, C, or C++ are a plus

Nice to Have:

  • Fluent English communication
This listing is enriched and indexed by YubHub. To apply, use the employer's original posting: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/Taiwan-Taipei/DFT-Engineer--RDSS-Intern----2027_JR2026180