NVIDIA 2027 Internships: Hardware Design for Test (DFT)

NVIDIA is offering a 12-week full-time internship for students pursuing an M.S. or Ph.D. degree in Electrical Engineering, Computer Engineering, or a related field. As an intern, you will work on projects with a measurable impact on the business, focusing on Hardware Design for Test (DFT).

Responsibilities:

• You will work on Design for Test (DFT) projects, including Digital Design, Test Architecture and DFT Planning, Static Timing Analysis (STA), Pre-Silicon and Post-Silicon Issue Debug.
• Your tasks may involve Scan Chain Design and ATPG, Boundary Scan and JTA, Memory BIST (Built-In Self-Test), Logic BIST and Compression (EDT, Streaming Scan Network), At-Speed and Delay Testing.

Requirements:

• You must be actively enrolled in a university pursuing an M.S. or Ph.D. degree in Electrical Engineering, Computer Engineering, or a related field.
• Course or internship experience related to DFT, Digital Design, and other specified areas is required.
• Prior experience or knowledge in programming skills such as Perl, TCL, C, C++, Python, and technologies like Synopsys, TetraMAX, Cadence Modus, Linux may be necessary.

Benefits:

• Competitive hourly rate of $20 - $71 per hour, depending on position, location, year in school, degree, and experience.
• Eligibility for Intern benefits.

Applications are accepted on an ongoing basis.