# Principal Analog Design Engineer

**Company**: Synopsys
**Location**: Markham, Ontario
**Work arrangement**: onsite
**Experience**: senior
**Job type**: full-time
**Salary**: $151000-$226000
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/markham/principal-analog-design-engineer-19318/44408/102265655552?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_fefa83be-596

## Description

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

As a Principal Analog Design Engineer, you will review JEDEC standards to define analog and mixed-signal sub-block specs for DDR/LPDDR, HBM, UCIe, and mobile storage PHY IP. You will design transistor-level circuits including equalizers, samplers, drivers, serializers, VCOs, PLLs, DLLs, bandgap references, ADCs, and DACs. You will develop verification strategies using SPICE simulators and Verilog-A models to ensure coverage across PVT corners. You will collaborate with layout engineers to minimize parasitics, manage device stress, and implement ESD protection. You will present simulation data and design tradeoffs to internal teams and customers. You will document circuit designs, test plans, and reliability considerations for tape out. You will consult on electrical characterization and silicon bring-up to validate your circuits in the final product.

The Impact You Will Have:

- Enable next-generation memory and interconnect solutions that define performance benchmarks for DDR, LPDDR, and HBM standards

- Deliver power-efficient, high-speed analog circuits in advanced FinFET nodes

- Reduce tape out risk through rigorous simulation and early identification of layout issues

- Influence circuit architecture decisions that shape Synopsys Solution IP product roadmaps

- Contribute to IP products that accelerate customer time to market for AI, mobile, automotive, and data center applications

What You'll Need:

- PhD with 6+ years or Master's with 8+ years of analog and mixed-signal IC design experience

- Deep expertise in transistor-level CMOS design with strong fundamentals in device physics and matching

- Proven experience designing circuits in FinFET process technologies

- Detailed design experience with high-speed sub-circuits: equalizers, samplers, drivers, serializers, VCOs, PLLs, DLLs, bandgaps, ADCs, or DACs

- Working knowledge of ESD protection techniques and layout strategies

- Proficiency with schematic entry, SPICE simulation (Spectre, HSPICE), and design verification tools

- Strong understanding of design-for-reliability including electromigration, IR drop, aging, and layout-dependent effects

Rewards and Benefits:

- Comprehensive medical and healthcare plans that work for you and your family

- In addition to company holidays, we have ETO and FTO Programs

- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more

- Purchase Synopsys common stock at a 15% discount, with a 24-month look-back

- Save for your future with our retirement plans that vary by region and country

- Competitive salaries

## Skills

### Required
- analog and mixed-signal IC design
- transistor-level CMOS design
- FinFET process technologies
- high-speed sub-circuits
- ESD protection techniques
- layout strategies
- schematic entry
- SPICE simulation
- design verification tools

### Nice to have
- Python
- Perl
- TCL
- MATLAB
- C

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Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/markham/principal-analog-design-engineer-19318/44408/102265655552?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)