# Principal Analog and Mixed Signal Engineer

**Company**: Synopsys
**Location**: Kanata
**Work arrangement**: onsite
**Experience**: senior
**Job type**: full-time
**Salary**: $98,000 - $147,000
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/kanata/principal-analog-and-mixed-signal-engineer-15996/44408/93015824864?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_fb653ed6-539

## Description

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

These engineers play a crucial role in advancing technology and enabling innovations in various industries.

As a Principal Analog and Mixed Signal Engineer, you will be part of the Solution IP R&D team, a collaborative group of analog and digital designers developing high-speed PHY IP for DDR/LPDDR, HBM, UCIe, and mobile storage applications.

Key Responsibilities:

- Review JEDEC standards to define analog and mixed-signal sub-block specs for DDR/LPDDR, HBM, UCIe, and mobile storage PHY IP

- Design transistor-level circuits including equalizers, samplers, drivers, serializers, VCOs, PLLs, DLLs, bandgap references, ADCs, and DACs

- Develop verification strategies using SPICE simulators and Verilog-A models to ensure coverage across PVT corners

- Collaborate with layout engineers to minimize parasitics, manage device stress, and implement ESD protection

- Present simulation data and design tradeoffs to internal teams and customers

- Document circuit designs, test plans, and reliability considerations for tape out

- Consult on electrical characterization and silicon bring-up to validate your circuits in the final product

Impact:

- Enable next-generation memory and interconnect solutions that define performance benchmarks for DDR, LPDDR, and HBM standards

- Deliver power-efficient, high-speed analog circuits in advanced FinFET nodes

- Reduce tape out risk through rigorous simulation and early identification of layout issues

- Influence circuit architecture decisions that shape Synopsys Solution IP product roadmaps

- Contribute to IP products that accelerate customer time to market for AI, mobile, automotive, and data center applications

Requirements:

- PhD with 6+ years or Master's with 8+ years of analog and mixed-signal IC design experience

- Deep expertise in transistor-level CMOS design with strong fundamentals in device physics and matching

- Proven experience designing circuits in FinFET process technologies

- Detailed design experience with high-speed sub-circuits: equalizers, samplers, drivers, serializers, VCOs, PLLs, DLLs, bandgaps, ADCs, or DACs

- Working knowledge of ESD protection techniques and layout strategies

- Proficiency with schematic entry, SPICE simulation (Spectre, HSPICE), and design verification tools

- Strong understanding of design-for-reliability including electromigration, IR drop, aging, and layout-dependent effects

Who You Are:

- You can look at a circuit topology and immediately identify the second-order effects that will matter at corner cases

- You communicate tradeoffs clearly, whether explaining a bias decision to a layout engineer or presenting jitter analysis to customers

- You push back when a specification does not make physical sense, and you do it in a way that moves the team forward

- You are comfortable scripting in Python, Perl, TCL, MATLAB, or C to automate simulation flows and build custom analysis tools

- You document your work clearly enough that someone else can pick up your design six months later and understand why you made each decision

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

## Skills

### Required
- transistor-level CMOS design
- device physics and matching
- FinFET process technologies
- high-speed sub-circuits
- ESD protection techniques
- schematic entry
- SPICE simulation
- design verification tools
- design-for-reliability

### Nice to have
- Python
- Perl
- TCL
- MATLAB
- C
- Verilog-A models
- PVT corners
- layout engineers
- electrical characterization

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Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/kanata/principal-analog-and-mixed-signal-engineer-15996/44408/93015824864?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)
