# Senior ASIC Verification Engineer - HSIO

**Company**: NVIDIA
**Location**: Westford, MA
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology

**Apply**: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-MA-Westford/Senior-ASIC-Verification-Engineer---HSIO_JR2023479?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_faabb09b-209

## Description

NVIDIA is seeking a Senior Design Verification Engineer to verify the design and implementation of the next generation of High Speed I/O controllers for the world’s leading SOCs and GPUs.

This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.

**Responsibilities:**

- Be responsible for the verification of ASIC design, architecture, golden models and micro-architecture of High Speed I/O controllers, like Ethernet and NVLink, at IP/sub-system levels using advanced DV methodologies such as UVM.

- Building reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology.

- Understanding the design specification and implementation, defining the verification scope, developing test plans, tests, and the verification infrastructure used to verify the correctness of the design.

- Collaborating with architects, designers, and pre and post silicon verification teams to accomplish your tasks.

**Requirements:**

- Bachelors or Masters Degree (or equivalent experience) with 5+ years of relevant experience

- Experience at Unit/Sub-system/SOC level and expertise in SystemVerilog, UVM

- Expertise in comprehensive verification of IP or interconnect protocols (e.g. Ethernet, USB, SATA)

- Experience in verification using random stimulus along with functional coverage and assertion-based verification methodologies (UVM) and exposure to industry standard verification tools for simulation

- Excellent debugging, analytical, and problem solving skills

- Great communication and collaboration skills to interact within the team and across functional teams

**Nice to Have:**

- Good understanding of the system level architecture of HSIO-based designs, like Ethernet or CXL

- Experience with Perl, Python or similar scripting and/or SW programming languages is highly desirable

- Experience with AI-enabled code assist or root-cause analysis tools

You will also be eligible for equity and benefits.

## Skills

### Required
- SystemVerilog
- UVM
- ASIC design
- verification methodologies

### Nice to have
- Perl
- Python
- AI-enabled code assist
- root-cause analysis tools

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Source: [Apply at nvidia.wd5.myworkdayjobs.com](https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-MA-Westford/Senior-ASIC-Verification-Engineer---HSIO_JR2023479?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)