# ASIC / FPGA Design Verification Engineer – (Lead or Senior)

**Company**: Boeing
**Location**: El Segundo, CA
**Work arrangement**: onsite
**Experience**: senior
**Job type**: full-time
**Salary**: $146,200 - $197,800
**Category**: Engineering
**Industry**: Aerospace & Defense

**Apply**: https://boeing.wd1.myworkdayjobs.com/en-US/EXTERNAL_CAREERS/job/USA---El-Segundo-CA/ASIC---FPGA-Design-Verification-Engineer----Lead-or-Senior-_JR2026522884-1?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_fa9ca378-403

## Description

Boeing Space, Intelligence & Weapons Systems is seeking multiple ASIC/FPGA Design Verification Engineers – (Lead or Senior) to join our team at the heart of Boeing’s products in El Segundo or Huntington Beach, CA.

The role involves developing scalable technical leaders who combine strong verification fundamentals, fluent UVM capability, technical ownership, systems awareness, mentorship, and increasing responsibility for verification execution, environments, closure activities, and team success.

Engineers will support ASIC, FPGA, and SoC verification activities across advanced aerospace programs, including space systems, satellite technologies, NASA mission support, and related digital subsystems.

Responsibilities:

- Independently own verification scope and contribute throughout product development

- Support verification planning, requirements traceability, simulation, integration, debug, closure, and delivery activities

- Establish and expand SystemVerilog and UVM environments, reusable verification infrastructure, and UVC development activities

- Define verification objectives, support measurable closure criteria, perform verification completeness assessments, and apply metrics-driven approaches

- Mentor engineers and lead technical efforts, verification teams, or workstreams when needed

Requirements:

- Bachelor of Science degree in Engineering, Computer Science, Data Science, Mathematics, Physics, Chemistry or non-US equivalent qualifications

- 9+ years of professional engineering experience in ASIC, FPGA, or SoC design verification

- Strong experience with SystemVerilog and UVM

- Fluent UVM experience including environment development

- 2+ projects standing up verification environments and reusable infrastructure

Preferred Qualifications:

- 14+ years of related engineering experience

- Active U.S. Secret Security Clearance

- 10+ years of verification experience

- Strong understanding of Digital design fundamentals and systems awareness fundamentals

- Feature, block, subsystem, or broader verification ownership

- Metrics-driven closure experience

- Requirements traceability and measurable verification objectives

- Mentoring and indirect technical leadership experience

- Project management or technical coordination experience

Benefits:

- Competitive base pay and variable compensation opportunities

- Health insurance, flexible spending accounts, health savings accounts, retirement savings plans, life and disability insurance programs

- Multiple paths for long-term growth

Salary Range:

- Lead (Level 4): $146,200 - $197,800

- Senior (Level 5): $164,900 - $223,100

## Skills

### Required
- SystemVerilog
- UVM
- ASIC
- FPGA
- SoC
- verification

### Nice to have
- Digital design fundamentals
- systems awareness
- metrics-driven closure
- requirements traceability
- mentoring
- project management

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Source: [Apply at boeing.wd1.myworkdayjobs.com](https://boeing.wd1.myworkdayjobs.com/en-US/EXTERNAL_CAREERS/job/USA---El-Segundo-CA/ASIC---FPGA-Design-Verification-Engineer----Lead-or-Senior-_JR2026522884-1?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)