# FPGA Design Engineer

**Company**: Cisco
**Location**: Caesarea, Israel
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology

**Apply**: https://cisco.wd5.myworkdayjobs.com/en-US/Cisco_Careers/job/Caesarea-Israel/FPGA-Design-Engineer--Cisco-Silicon-One_2029678?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_f89809f7-155

## Description

The Silicon One team at Cisco is looking for an FPGA Design Engineer to lead the FPGA design and development of complex systems supporting next-generation networking devices and AI infrastructure.

You will take technical ownership of FPGA design activities, including architecture definition, RTL development, simulation, synthesis, timing closure, and hardware validation.

Key responsibilities:

- Define FPGA specifications, develop and implement RTL designs, and collaborate with Hardware, ASIC, Software, and System engineering teams throughout the product lifecycle.

- Design and integrate high-speed interfaces and communication protocols, including PCIe, Ethernet, and SerDes.

- Identify and resolve complex functional, timing, and integration issues through simulation, debugging tools, and hardware measurements.

Minimum qualifications:

- B.Sc. in Electrical Engineering or equivalent practical experience.

- 4+ years of experience as an FPGA design engineer, developing and delivering complex FPGA-based projects.

- Experience in RTL design using Verilog or SystemVerilog.

Preferred qualifications:

- Experience with FPGA architecture, design implementation, synthesis, place-and-route, and timing closure.

- Solid understanding of digital design principles, including clock domain crossing (CDC), timing constraints, synchronization, and reset methodologies.

- Experience with FPGA simulation, functional verification, and debugging using industry-standard EDA tools.

- Experience integrating FPGA IP cores, memory interfaces, and communication protocols.

## Skills

### Required
- FPGA design
- RTL development
- Verilog
- SystemVerilog
- Electrical Engineering

### Nice to have
- FPGA architecture
- digital design principles
- clock domain crossing (CDC)
- timing constraints
- synchronization
- reset methodologies
- FPGA simulation
- functional verification
- debugging
- EDA tools
- FPGA IP cores
- memory interfaces
- communication protocols

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Source: [Apply at cisco.wd5.myworkdayjobs.com](https://cisco.wd5.myworkdayjobs.com/en-US/Cisco_Careers/job/Caesarea-Israel/FPGA-Design-Engineer--Cisco-Silicon-One_2029678?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)