# ASIC-PD Engineer

**Company**: NVIDIA
**Location**: Hsinchu, Taiwan
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology

**Apply**: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/Taiwan-Hsinchu/ASIC-Physical-Design-Engineer---New-College-Graduate_JR2028466?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/job/asic-pd-engineer-efb66548-cd9/

## Description

As an ASIC-PD engineer at NVIDIA, you'll work on the physical design of digital chips, focusing on high frequency, low power consumption, and multiple applications. Your responsibilities include:

- Chip integration and netlist generation

- Synthesis, RTL/netlist quality check, and formal verification

- Constraints creation and validation, timing budget

- Collaborating with the ASIC team to resolve timing issues and implement chip partitioning and floorplan

- Achieving timing closure for both partition and full chip levels

- Special mode timing closure, such as io, test, clock, async

- Function eco creation

- Developing and improving the entire timing closure flow from frontend to backend

- Flow automation development

To succeed in this role, you should have:

- MS in EE or Microelectronics

- Project experience in IC design implementation

- Courses taken in circuit design, digital design

- Hands-on experience with EDA software from Synopsys (DC/PT/Formality), Cadence (RC compiler/LEC)

- Proficiency in Python or TCL

- Proficient in English reading and writing

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## Skills

### Required
- EE or Microelectronics
- IC design implementation
- circuit design
- digital design
- EDA software
- Python
- TCL
- English

### Nice to have
- Synopsys DC/PT/Formality
- Cadence RC compiler/LEC

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Source: [Apply at nvidia.wd5.myworkdayjobs.com](https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/Taiwan-Hsinchu/ASIC-Physical-Design-Engineer---New-College-Graduate_JR2028466?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)