# ASIC Verification Engineer

**Company**: NVIDIA
**Location**: Santa Clara, CA
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology

**Apply**: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/ASIC-Verification-Engineer_JR2022280?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_ec5b1791-65e

## Description

NVIDIA's Clocks team is seeking an experienced ASIC Design Verification engineer to join their team.

The NVIDIA Clocks Team is committed to delivering high-quality clocking and reset logic to various units in SOC and GPU ASIC. The complexity of the clocks and resets design has increased significantly, requiring sophisticated verification to deliver a bug-free clocks design to power product lines ranging from Data Centers, Consumer graphics to Self-driving cars and artificial intelligence.

**Responsibilities:**

- Own validation of Clocking structures in Tegra and GPU products from start to finish, including test plan development, automation, validation flows development, coverage metrics, test execution, bug identification/fix, and productization.

- Develop scalable solutions to tackle sophisticated problems that work across platforms.

- Utilize industry-standard tools and state-of-the-art verification methodologies, including coding in System Verilog, UVM, C++, Perl, Python, and NVIDIA custom compilers and tools.

- Partner closely with the clocks architecture and design team to validate clocks design.

- Coordinate with internal and external teams across time zones.

**Requirements:**

- BS or MS in EE/ECE or equivalent experience.

- 3+ years of proven design verification experience.

- Good understanding of Logic Design and Architecture.

- Expertise in industry-standard verification flows like SV constraint random verification, UVM, Formal Verification, Coverage metrics, profiling tools, X prop, etc.

- Exposure to block-level and system-level verification.

- Strong coding skills in System Verilog, scripting languages (Perl/Python), and C++.

- Ability to collaborate and work with multiple groups.

- Prior experience in implementing Test plans for pre-silicon platforms.

**Preferred Qualifications:**

- Previous experience automating tasks in the design verification process.

- Hands-on experience in object-oriented programming.

- Prior design or verification experience at the IP or block level.

- Experience developing methodologies used by others.

- Demonstrated ability to drive a project to completion.

NVIDIA offers equity and benefits to its employees.

## Skills

### Required
- System Verilog
- UVM
- C++
- Perl
- Python
- ASIC Design Verification
- Logic Design
- Architecture

### Nice to have
- object-oriented programming
- design verification automation
- IP/block level design
- methodology development

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Source: [Apply at nvidia.wd5.myworkdayjobs.com](https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/ASIC-Verification-Engineer_JR2022280?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)